A Research on Fundamental Technology for High Performance Acceleration

• Project/Area Number: 24240005
• Research Category: Grant-in-Aid for Scientific Research (A)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Computer system/Network
• Research Institution: Nara Institute of Science and Technology
• Principal Investigator: NAKASHIMA YASUHIKO 奈良先端科学技術大学院大学, 情報科学研究科, 教授 (00314170)
• Co-Investigator(Kenkyū-buntansha): YAO Jun 奈良先端科学技術大学院大学, 情報科学研究科, 准教授 (40567153) ; HARA Yuko 奈良先端科学技術大学院大学, 情報科学研究科, 助教 (20640999)
• Project Period (FY): 2012-04-01 – 2015-03-31
• Project Status: Completed (Fiscal Year 2014)
• Budget Amount: ¥27,950,000 (Direct Cost: ¥21,500,000、Indirect Cost: ¥6,450,000); Fiscal Year 2014: ¥11,960,000 (Direct Cost: ¥9,200,000、Indirect Cost: ¥2,760,000); Fiscal Year 2013: ¥3,380,000 (Direct Cost: ¥2,600,000、Indirect Cost: ¥780,000); Fiscal Year 2012: ¥12,610,000 (Direct Cost: ¥9,700,000、Indirect Cost: ¥2,910,000)
• Keywords: 演算器アレイ / アクセラレータ / ステンシル計算 / ベクトル計算 / 低電力 / グラフ処理

Outline of Final Research Achievements

In contrast to traditional multi-threading platforms that are hard to improve power efficiency and hard to estimate performance, an acceleration technique that can fully utilize memory bandwidth and can easily fit to the performance and power model is established. A 12.5mm square prototype LSI of FU-array accelerator that can reduce the overheads of data movement and can work as vector mode has been designed. The power consumption is found to be only 0.88Watt and the performance per watt reaches 7.7GFlops/Watt.

Research Products

• [Journal Article] A Flexible, Self-Tuning, Fault-Tolerant Functional Unit Array Processor (2014)
  • Author(s): Jun Yao, Yasuhiko Nakashima, Mitsutoshi Saito, Yohei Hazama, Ryosuke Yamanaka
  • Journal Title: IEEE Micro Volume: 34-6 Issue: 6 Pages: 54-63
  • DOI: 10.1109/mm.2014.92
  • Peer Reviewed / Open Access / Acknowledgement Compliant
• [Journal Article] A Tightly Coupled General Purpose Reconfigurable Accelerator LAPP and Its Power States for HotSpot-Based Energy Reduction (2014)
  • Author(s): Jun YAO, Yasuhiko NAKASHIMA, Naveen DEVISETTI, Kazuhiro YOSHIMURA, Takashi NAKADA
  • Journal Title: IEICE Transactions on Information and Systems Volume: E97.D Issue: 12 Pages: 3092-3100
  • DOI: 10.1587/transinf.2014PAP0025
  • NAID: 130004841768
  • ISSN: 0916-8532, 1745-1361
  • Peer Reviewed / Open Access / Acknowledgement Compliant
• [Journal Article] Hinting for Auto-Memoization Processor based on Static Binary Analysis (2014)
  • Author(s): Takanori TSUMURA, Yuuki SHIBATA, Kazutaka KAMIMURA, Tomoaki TSUMURA, Yasuhiko NAKASHIMA
  • Journal Title: Proc. 2nd Int'l Workshop on Computer Systems and Architectures Volume: CSA'14 Pages: 426-432
  • DOI: 10.1109/candar.2014.49
  • Peer Reviewed / Open Access
• [Journal Article] Performance Evaluation of a 3D-Stencil Library for Distributed Memory Array Accelerators (2014)
  • Author(s): Yoshikazu Inagaki, Shinya Takamaeda-Yamazaki, Jun Yao, Yasuhiko Nakashima
  • Journal Title: Proc. 2nd Int'l Workshop on Computer Systems and Architectures Volume: CSA'14 Pages: 388-393
  • DOI: 10.1109/candar.2014.100
  • NAID: 130005112347
  • Peer Reviewed / Open Access / Acknowledgement Compliant
• [Journal Article] An Implementation of Auto-Memoization Mechanism on ARM-based Superscalar Processor (2014)
  • Author(s): Yuuki Shibata, Takanori Tsumura, Tomoaki Tsumura and Yasuhiko Nakashima
  • Journal Title: Proc. Int'l Symp. on System-on-Chip 2014 Volume: SoC2014 Pages: 1-8
  • DOI: 10.1109/issoc.2014.6972435
  • Peer Reviewed / Open Access
• [Journal Article] A Two-Order Increase in Robustness of Partial Redundancy Under a Radiation Stress Test by Using SDC Prediction (2014)
  • Author(s): Tanvir Ahmed, Jun Yao, and Yasuhiko Nakashima
  • Journal Title: IEEE Transactions on Nuclear Science Volume: 未定（採録決定）
  • Peer Reviewed
• [Journal Article] Selective Check of Data-Path for Effective Fault Tolerance (2013)
  • Author(s): Tanvir AHMED, Jun YAO, Yuko HARA-AZUMI, Shigeru YAMASHITA, and Yasuhiko NAKASHIMA
  • Journal Title: IEICE Trans. Volume: Vol.J96-D,No.8 Pages: 1592-1601
  • NAID: 130003370941
  • Peer Reviewed
• [Journal Article] 線形演算器アレイ型アクセラレータを備えた高電力効率プロセッサの開発 (2012)
  • Author(s): 齊藤光俊, 下岡俊介, Devisetti Venkatarama Naveen, 大上俊, 吉村和浩, 姚駿, 中田尚, 中島康彦
  • Journal Title: 電子情報通信学会論文誌D Volume: Vol.J95-D, No.9 Pages: 1729-1737
  • Peer Reviewed
• [Journal Article] 時分割実行機構による演算器アレイ型アクセラレータの効率化 (2012)
  • Author(s): 岩上拓矢, 吉村和浩, 中田尚, 中島康彦
  • Journal Title: 情報処理学会論文誌コンピューティングシステム Volume: ACS39, Vol.5, No.4 Pages: 13-23
  • NAID: 40019469346
  • Peer Reviewed
• [Journal Article] 画像処理向け線形アレイアクセラレータの性能評価 (2012)
  • Author(s): 中田尚, 吉村和浩, 下岡俊介, 大上俊, Devisetti Venkatarama Naveen, 中島康彦
  • Journal Title: 情報処理学会論文誌コンピューティングシステム Volume: ACS38, Vol.5, No.3 Pages: 74-85
  • NAID: 40019469283
  • Peer Reviewed
• [Journal Article] 異種命令セットアーキテクチャを持つ高電力効率SMT プロセッサの開発 (2012)
  • Author(s): 吉村和浩, 中田尚, 中島康彦, 北村俊明
  • Journal Title: 電子情報通信学会論文誌D Volume: Vol.J95-D、No.6 Pages: 1334-1346
  • Peer Reviewed
• [Journal Article] A Speed-Up Technique for an Auto-Memoization Processor by Reusing Partial Results of Instruction Regions (2012)
  • Author(s): Kazutaka KAMIMURA, Ryosuke ODA, Tatsuhiro YAMADA, Tomoaki TSUMURA, Hiroshi MATSUO, Yasuhiko NAKASHIMA
  • Journal Title: Proc. 3rd Int'l. Conf. on Networking and Computing (ICNC'12) Volume: ICNC12 Pages: 49-57
  • DOI: 10.1109/icnc.2012.17
• [Presentation] A Parameterized Many Core Simulator for Design Space Exploration (2015)
  • Author(s): Shohei Takeuchi, Thi Hong Tran, Shinya Takamaeda, Yasuhiko Nakashima
  • Organizer: IEEE Symposium on Low-Power and High-Speed Chips
  • Place of Presentation: Yokohama Bunka-Center（Yokohama)
  • Year and Date: 2015-04-13 – 2015-04-15
• [Presentation] XStenciler: a 7.1GFLOPS/W 16-Core Coprocessor with a Ring Structure for Stencil Applications (2015)
  • Author(s): Jun Yao, Yasuhiko Nakashima, Kazutoshi Kobayashi, Makoto Ikeda, Wei Xue, Tomohiro Fujiwara, Ryo Shimizu, Masakazu Tanomoto, Yangtong Xu, Xinliang Wang, Weimin Zheng
  • Organizer: XStenciler: a 7.1GFLOPS/W 16-Core Coprocessor with a Ring Structure for Stencil Applications
  • Place of Presentation: Yokohama Bunka-Center（Yokohama)
  • Year and Date: 2015-04-13 – 2015-04-15
• [Presentation] Lowering the Complexity of k-means Clustering by BFS-dijkstra method for Graph Computing (2015)
  • Author(s): Anna Zhang, Jun Yao, Yasuhiko Nakashima
  • Organizer: XStenciler: a 7.1GFLOPS/W 16-Core Coprocessor with a Ring Structure for Stencil Applications
  • Place of Presentation: Yokohama Bunka-Center（Yokohama)
  • Year and Date: 2015-04-13 – 2015-04-15
• [Presentation] 次世代アプリケーションのための包括的なアーキテクチャ探索環境の検討 (2014)
  • Author(s): 竹内昌平, 高前田(山崎)伸也, 姚駿, 中島康彦
  • Organizer: 信学技報CPSY2014-89
  • Place of Presentation: 機械振興会館
  • Year and Date: 2014-12-01 – 2014-12-02
• [Presentation] データムービングボトルネックを解決するためのインテリジェントメモリシステムの検討 (2014)
  • Author(s): 枝元正寛, 高前田伸也, 姚駿, 中島康彦
  • Organizer: 信学技報CPSY2014-91
  • Place of Presentation: 機械振興会館
  • Year and Date: 2014-12-01 – 2014-12-02
• [Presentation] Triangle Countingのための大規模グラフ分割手法 (2014)
  • Author(s): 平野竜洋, 高前田伸也, 姚駿, 中島康彦
  • Organizer: 信学技報CPSY2014-73
  • Place of Presentation: ビーコンプラザ（別府国際コンベンションセンター）
  • Year and Date: 2014-11-26 – 2014-11-28
• [Presentation] 最短経路探索の並列化と各種プラットホームによる性能比較 (2014)
  • Author(s): 紅林修斗, 高前田伸也, 姚駿, 中島康彦
  • Organizer: 信学技報CPSY2014-74
  • Place of Presentation: ビーコンプラザ（別府国際コンベンションセンター）
  • Year and Date: 2014-11-26 – 2014-11-28
• [Presentation] メモリネットワークベースアクセラレータの試作と評価 (2014)
  • Author(s): 清水怜, 田ノ元正和, 高前田(山崎)伸也, 姚駿, 中島康彦
  • Organizer: 信学技報CPSY2014-81
  • Place of Presentation: ビーコンプラザ（別府国際コンベンションセンター）
  • Year and Date: 2014-11-26 – 2014-11-28
• [Presentation] メモリネットワークベースアクセラレータを用いた畳み込みニューラルネットワーク処理 (2014)
  • Author(s): 田ノ元正和, 高前田(山崎)伸也, 姚駿, 中島康彦
  • Organizer: 信学技報CPSY2014-82
  • Place of Presentation: ビーコンプラザ（別府国際コンベンションセンター）
  • Year and Date: 2014-11-26 – 2014-11-28
• [Presentation] ニューラルネットワーク処理のエラー削減に向けた命令実行手法 (2014)
  • Author(s): 小池和正，高前田(山崎)伸也，姚駿，中島康彦
  • Organizer: 信学技報CPSY2014-33
  • Place of Presentation: 朱鷺メッセ 新潟コンベンションセンター
  • Year and Date: 2014-07-29 – 2014-07-30
• [Presentation] PyCoRAMを用いたグラフ処理FPGAアクセラレータ (2014)
  • Author(s): 高前田(山崎)伸也，枝元正寛，姚駿，中島康彦
  • Organizer: 信学技報CPSY2014-10
  • Place of Presentation: 朱鷺メッセ 新潟コンベンションセンター
  • Year and Date: 2014-07-28 – 2014-07-30
• [Presentation] メモリインテンシブアレイアクセラレータを用いた高性能グラフ処理 (2014)
  • Author(s): 清水怜，高前田(山崎)伸也，姚駿，中島康彦
  • Organizer: 信学技報CPSY2014-11
  • Place of Presentation: 朱鷺メッセ 新潟コンベンションセンター
  • Year and Date: 2014-07-28 – 2014-07-30
• [Presentation] Performance Tuning of a Global Shallow-water Atmospheric Model on Xeon Phi (2014)
  • Author(s): Masakazu Tanomoto, Jun Yao, Yasuhiko Nakashima, Yangtong Xu, Xinliang Wang, Wei Xue
  • Organizer: IEEE Symposium on Low-Power and High-Speed Chips
  • Place of Presentation: Yokohama Bunka-Center（Yokohama)
  • Year and Date: 2014-04-14 – 2014-04-16
• [Presentation] A Pipelined Newton-Raphson Method for Floating Point Division and Square Root on Distribted Memory CGRAs (2014)
  • Author(s): Shuto Kurebayashi, Jun Yao, Yasuhiko Nakashima
  • Organizer: IEEE Symposium on Low-Power and High-Speed Chips
  • Place of Presentation: Yokohama Bunka-Center（Yokohama)
  • Year and Date: 2014-04-14 – 2014-04-16
• [Presentation] Tuning of a Breadth First based Triangle-counting by using Multi-threading (2014)
  • Author(s): Tatsuhiro Hirano, Jun Yao, Yasuhiko Nakashima
  • Organizer: IEEE Symposium on Low-Power and High-Speed Chips
  • Place of Presentation: Yokohama Bunka-Center（Yokohama)
  • Year and Date: 2014-04-14
• [Presentation] EReLA: a Low-Power Reliable Coarse-Grained Reconfigurable Architecture Processor and Its Irradiation Tests (2014)
  • Author(s): Jun Yao, Mitsutoshi Saito, Shogo Okada, Kazutoshi Kobayashi, and Yasuhiko Nakashima
  • Organizer: IEEE Nuclear and Space Radiation Effects Conference 2014 (poster)
  • Place of Presentation: Paris
• [Presentation] Performance Tuning of a Global Shallow-water Atmospheric Model on Xeon Phi (2014)
  • Author(s): Masakazu Tanomoto, Jun Yao, Yasuhiko Nakashima, Yangtong Xu, Xinliang Wang, Wei Xue
  • Organizer: IEEE Symposium on Low-Power and High-Speed Chips 2014 (poster)
  • Place of Presentation: Yokohama
• [Presentation] A Pipelined Newton-Raphson Method for Floating Point Division and Square Root on Distribted Memory CGRAs (2014)
  • Author(s): Shuto Kurebayashi, Jun Yao, Yasuhiko Nakashima
  • Organizer: IEEE Symposium on Low-Power and High-Speed Chips 2014 (poster)
  • Place of Presentation: Yokohama
• [Presentation] Tuning of a Breadth First based Triangle-counting by using Multi-threading (2014)
  • Author(s): Tatsuhiro Hirano, Jun Yao, Yasuhiko Nakashima
  • Organizer: IEEE Symposium on Low-Power and High-Speed Chips 2014 (poster)
  • Place of Presentation: Yokohama
• [Presentation] A Flexibly Fault-Tolerant FU Array Processor and its Self-Tuning Scheme to Locate Permanently Defective Unit (2014)
  • Author(s): Jun Yao, Yasuhiko Nakashima, Mitsutoshi Saito, Yohei Hazama, Ryosuke Yamanaka
  • Organizer: IEEE Symposium on Low-Power and High-Speed Chips 2014
  • Place of Presentation: Yokohama
• [Presentation] 演算器アレイ型アクセラレータへのメモリインテンシブなアプリケーションの写像と性能評価 (2014)
  • Author(s): 林大地, 藤原知広, 姚駿, 中島康彦
  • Organizer: 情報処理学会研究報告, 計算機アーキテクチャ研究会報告
  • Place of Presentation: 東工大
• [Presentation] メモリ分散型アレイアクセラレータのための命令生成手法の開発と評価 (2014)
  • Author(s): 楠田浩平, 姚駿, 中島康彦
  • Organizer: 情報処理学会研究報告, 計算機アーキテクチャ研究会報告
  • Place of Presentation: 東工大
• [Presentation] CAM Size Reduction Method for Auto-Memoization Processor by considering Characteristics of Loops (2013)
  • Author(s): Yuuki SHIBATA, Kazutaka KAMIMURA, Tomoaki TSUMURA, Hiroshi MATSUO, Yasuhiko NAKASHIMA
  • Organizer: Proc. 1st Int'l Workshop on Computer Systems and Architectures (CSA'13)
  • Place of Presentation: 道後ひめぎんホール
• [Presentation] A Two-Order Increase in Robustness of Partial Redundancy Under Radiation Stress Test by Using SDC Prediction (2013)
  • Author(s): Tanvir AHMED, Jun YAO, and Yasuhiko NAKASHIMA
  • Organizer: IEEE Conference on Radiation Effects on Components and Systems (RADECS)
  • Place of Presentation: Oxford
• [Presentation] リング型アレイアクセレータ向け演算ライブラリの実装と性能評価 (2013)
  • Author(s): 稲垣慶和, 原祐子, 姚駿,中島康彦
  • Organizer: 研究報告計算機アーキテクチャ（ARC）
  • Place of Presentation: 北九州
• [Presentation] メモリ分散型アレイアクセラレータの浮動小数点演算に関する性能考察 (2013)
  • Author(s): 林大地, 関賀, 原祐子, 姚駿,中島康彦
  • Organizer: 研究報告計算機アーキテクチャ（ARC）
  • Place of Presentation: 北九州
• [Presentation] リング型アレイアクセラレータのマクロパイプライン化による性能見積もり (2013)
  • Author(s): 藤原知広, 姚駿, 原祐子, 中島康彦
  • Organizer: 研究報告計算機アーキテクチャ（ARC
  • Place of Presentation: 北九州
• [Presentation] 再利用表パージアルゴリズムの改良による自動メモ化プロセッサのハードウェア削減手法 (2013)
  • Author(s): 柴田裕貴, 神村和敬, 津邑公暁, 松尾啓志, 中島康彦
  • Organizer: 研究報告計算機アーキテクチャ（ARC）
  • Place of Presentation: 北九州
• [Presentation] コヒーレントキャッシュを用いたSoCのシステム設計技法 (2013)
  • Author(s): 森高晃大, 吉田浩章, 伴野充,中島康彦
  • Organizer: システムLSI設計技術研究発表会
  • Place of Presentation: 北九州
• [Presentation] HW/SW Approaches to Accelerate GRAPES in an FU Array (2013)
  • Author(s): Wei Wang, Jun Yao, Youhui Zhang, Wei Xue, Yasuhiko Nakashima, and Weimin Zheng
  • Organizer: IEEE Symposium on Low-Power and High-Speed Chips 2013
  • Place of Presentation: Yokohama
• [Presentation] 再利用対象区間の細分化による自動メモ化プロセッサの高速化 (2012)
  • Author(s): 神村和敬, 山田龍寛, 小田遼亮, 津邑公暁, 松尾啓志, 中島康彦
  • Organizer: 研究報告計算機アーキテクチャ（ARC）
  • Place of Presentation: 鳥取市とりぎん文化会館
• [Presentation] GCCのvectorizerを利用した演算器アレイ向け命令変換手法
  • Author(s): 王昊，姚駿，中島康彦
  • Organizer: 研究報告計算機アーキテクチャ(ARC)2013-ARC-203 No.9
  • Place of Presentation: 早稲田大学
• [Presentation] リング接続を利用しデータ移動を最小限にするアクセラレータの提案
  • Author(s): 関賀，姚駿，中島康彦
  • Organizer: 研究報告システムLSI設計技術（SLDM）SIG Technical Reports, 2013-SLDM-159, Vol.17
  • Place of Presentation: 慶応大学
• [Book] コンピュータアーキテクチャ (2012)
  • Author(s): 中島康彦
  • Total Pages: 203
  • Publisher: オーム社
• [Remarks] コンピューティング・アーキテクチャ研究室
  • URL: http://arch.naist.jp/
• [Remarks] NAIST Computing Architecture Lab.
  • URL: http://arch.naist.jp/index.html
• [Remarks] Computing Architecture Lab.
  • URL: http://arch.naist.jp
• [Patent(Industrial Property Rights)] データ処理装置 (2015)
  • Inventor(s): 中島康彦・高前田伸也
  • Industrial Property Rights Holder: 中島康彦・高前田伸也
  • Industrial Property Rights Type: 特許
  • Industrial Property Number: 2015-079552
  • Filing Date: 2015-04-08
• [Patent(Industrial Property Rights)] データ供給装置及びデータ処理装置 (2013)
  • Inventor(s): 中島康彦, 姚駿
  • Industrial Property Rights Holder: 中島康彦, 姚駿
  • Industrial Property Rights Type: 特許
  • Filing Date: 2013-03-15
  • Overseas