studies on high-reliability timing design methods for logic circuits using advanced devices
| Project/Area Number |
24500061
|
|---|
| Research Category |
Grant-in-Aid for Scientific Research (C)
|
| Allocation Type | Multi-year Fund |
|---|
| Section | 一般 |
|---|
| Research Field |
Computer system/Network
|
|---|
| Research Institution | Kyoto University |
|---|
Principal Investigator |
|
|---|
| Project Period (FY) |
2012-04-01 – 2015-03-31
|
| Project Status |
Completed (Fiscal Year 2014)
|
| Budget Amount *help |
¥4,550,000 (Direct Cost: ¥3,500,000、Indirect Cost: ¥1,050,000)
Fiscal Year 2014: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2013: ¥1,690,000 (Direct Cost: ¥1,300,000、Indirect Cost: ¥390,000)
Fiscal Year 2012: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
|
|---|
| Keywords | 論理回路 / 論理関数 / タイミング設計 / レイアウト設計 / 超伝導単一磁束量子デバイス |
|---|
| Outline of Final Research Achievements |
We obtained the following two results.
1. We developed an automatic placement and routing method for integrated circuits using superconducting single-flux-quantum logic device which can realize super high-speed and low-power consumption logic circuits.
2. Adiabatic quantum-flux-parametron is a super low-power logic device and attempts to build large scale circuits with the device have begun recently. The basic logic elements are majority gates. We enumerated minimum depth circuits for all five-variable logic functions using three-input majority gates.The result is useful as the basis for logic synthesis method for the device.
|
Report
(4 results)
Research Products
(5 results)
