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Study on diverse evaluation technology of ultra-fine, ultra-low-power analog LSIs for environmental sensors

Research Project

Project/Area Number 24560411
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Electron device/Electronic equipment
Research InstitutionThe University of Kitakyushu

Principal Investigator

NAKATAKE Shigetoshi  北九州市立大学, 国際環境工学部, 教授 (10282831)

Project Period (FY) 2012-04-01 – 2015-03-31
Project Status Completed (Fiscal Year 2014)
Budget Amount *help
¥5,460,000 (Direct Cost: ¥4,200,000、Indirect Cost: ¥1,260,000)
Fiscal Year 2014: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2013: ¥2,860,000 (Direct Cost: ¥2,200,000、Indirect Cost: ¥660,000)
Fiscal Year 2012: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Keywordsセンサー / 計装アンプ / 統計的シミュレーション / 製造性シミュレーション / オペアンプ / レイアウト / ADC / アナログIC / 環境発電IC / 環境センサー / 低電力アナログ / アナログIC評価 / 低電力オペアンプ / 計装オペアンプ
Outline of Final Research Achievements

This research deals with a circuit evaluation technology to manufacture low-cost analog integrated circuits, typically, an instrumentation amplifier that it measures small analog signals for a variety of environmental sensors. In details, in order to reproduce the manufacturability without chip fabrication, we established a methodology to evaluate the manufacturability of instrumentation amplifiers with respect to their performances introducing statistical simulation considering the layout dependence of the transistors inside the chip. Besides, for the purpose of a systematic evaluation of the methodology, we developed a prototype of a small sensor with the instrumentation amplifier, and revealed the sensor had practical quality from the viewpoint of the communication quality with the sensing accuracy.

Report

(4 results)
  • 2014 Annual Research Report   Final Research Report ( PDF )
  • 2013 Research-status Report
  • 2012 Research-status Report
  • Research Products

    (20 results)

All 2015 2014 2013 2012

All Journal Article (6 results) (of which Peer Reviewed: 6 results,  Open Access: 3 results) Presentation (14 results) (of which Invited: 1 results)

  • [Journal Article] A Novel Retargeting Methodology in Computer Aided Design of Nano-watt CMOS Reference Circuit based on Advanced Compact MOSFET Model2015

    • Author(s)
      Gong Chen, Qing Dong, Shigetoshi Nakatake, Zhangcai Huang, Yasuaki Inoue
    • Journal Title

      Journal of Computational Information Systems

      Volume: to appear

    • Related Report
      2014 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] Layout Dependent Effect-aware Leakage Current Reduction and Its Application to Low-power SAR-ADC2015

    • Author(s)
      Gong Chen, Yu Zhang, Qing Dong, Mingyu Li, Shigetoshi Nakatake
    • Journal Title

      IEICE Transaction on Fundamentals of ECCS

      Volume: to appear

    • NAID

      130005085790

    • Related Report
      2014 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] New Sparse Design Framework for Broadband Power Amplifier Behavioral Modeling and Digital Predistortion2014

    • Author(s)
      Mingyu Li, Chuan Li, Gong Chen, Yu Zhang, Qing Dong, Shigetoshi Nakatake
    • Journal Title

      IEEJ Transaction on Electrical and Electronic Engineering

      Volume: Vol.9, No.5 Pages: 532-541

    • Related Report
      2014 Annual Research Report
    • Peer Reviewed / Open Access
  • [Journal Article] Structured Analog Circuit and Layout Design with Transistor Array2013

    • Author(s)
      Bo YANG, Qing DONG, Jing LI, Shigetoshi NAKATAKE
    • Journal Title

      IEICE Transaction on Fundamentals of ECCS

      Volume: E96-A, No.12 Pages: 2475-2486

    • NAID

      130003385300

    • Related Report
      2013 Research-status Report
    • Peer Reviewed
  • [Journal Article] Analog Circuit Synthesis with Constraint Generation of Layout-Dependent Effects by Geometric Programming2013

    • Author(s)
      Yu ZHANG, Gong CHEN, Bo YANG, Jing LI, Qing DONG, Ming-Yu LI, Shigetoshi NAKATAKE
    • Journal Title

      IEICE Transaction on Fundamentals of ECCS

      Volume: Vol. E96-A No.12 Pages: 2487-2498

    • NAID

      130003385301

    • Related Report
      2013 Research-status Report
    • Peer Reviewed
  • [Journal Article] A retargeting methodology of nano-watt CMOS reference circuit based on advanced compact MOSFET model.2012

    • Author(s)
      Gong Chen, Bo Yang, Shigetoshi Nakatake, Zhangcai Huang, Yasuaki Inoue
    • Journal Title

      Proc. of IEEE International Symposium on Circuits and Systems

      Volume: 1

    • Related Report
      2012 Research-status Report
    • Peer Reviewed
  • [Presentation] Oxygen Sensor Module with Majority Sensing for Monitoring Wide Area at Disaster2015

    • Author(s)
      Ryuta Nishino, Tatsuya Yamada, Qing Dong, Shigetoshi Nakatake
    • Organizer
      19th Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Place of Presentation
      Yilian, Taiwan
    • Year and Date
      2015-03-16 – 2015-03-17
    • Related Report
      2014 Annual Research Report
  • [Presentation] A Study on Visualization of Auscultation-Based Blood Pressure Measurement2015

    • Author(s)
      Yusuke Katsuki, Mingyu Li, Qing Dong, Shigetoshi Nakatake
    • Organizer
      19th Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Place of Presentation
      Yilian, Taiwan
    • Year and Date
      2015-03-16 – 2015-03-17
    • Related Report
      2014 Annual Research Report
  • [Presentation] Clock Skew Post-silicon Tuning by Multilevel Delay Locked Loop2014

    • Author(s)
      Daijiro Murooka, Yu Zhang, Qing Dong and Shigetoshi Nakatake
    • Organizer
      IEEE/ACM Workshop on Variability Modeling and Characterization
    • Place of Presentation
      San Jose, CA, USA
    • Year and Date
      2014-11-06
    • Related Report
      2014 Annual Research Report
  • [Presentation] Layout-dependent Manufacturability Evaluation of Instrumentation Amplifier2014

    • Author(s)
      T. Hirata, R. Nishino, S. Nakatake, M. Shimoyama, M. Miyagawa, K. Tanno, A. Yamada
    • Organizer
      IEEE/ACM Workshop on Variability Modeling and Characterization
    • Place of Presentation
      San Jose, CA. USA
    • Year and Date
      2014-11-06
    • Related Report
      2014 Annual Research Report
  • [Presentation] A 9-bit 50MSps SAR ADC with Pre-charge VCM-based Double Input Range Algorithm2013

    • Author(s)
      Gong Chen, Yu Zhang, Qing Dong, Shigetoshi Nakatake, Bo Yang, Jing Li
    • Organizer
      ACM Great Lake Synposium on VLSI 2013
    • Place of Presentation
      Paris
    • Related Report
      2013 Research-status Report
  • [Presentation] Performance-driven SRAM Macro Design with Parameterized Cell Considering Layout-dependent Effects2013

    • Author(s)
      Yu Zhang, Gong Chen, Qing Dong, Mingyu Li, Shigetoshi Nakatake
    • Organizer
      21st IFIP/IEEE International Conference on Very Large Scale Integration
    • Place of Presentation
      Istanbul
    • Related Report
      2013 Research-status Report
  • [Presentation] Wideband Digital Predistorter Design Using Subspace Pursuit-Based Volterra Model2013

    • Author(s)
      Mingyu Li, Yu Zhang, Gong Chen, Qing Dong, Shigetoshi Nakatake
    • Organizer
      The 2013 International Conference on Integrated Circuits, Design, and Verification
    • Place of Presentation
      Ho Chi Minh
    • Related Report
      2013 Research-status Report
  • [Presentation] A Delay-Locked Loop with Multi-Level Channel Length Decomposed Programming Delay Elements2013

    • Author(s)
      Zhang Yu, Gong Chen, Mingyu Li, Qing Dong, Shigetoshi Nakatake
    • Organizer
      The 2013 International Conference on Integrated Circuits, Design, and Verification
    • Place of Presentation
      Ho Chi Minh
    • Related Report
      2013 Research-status Report
  • [Presentation] Routability-driven Common-Centroid Capacitor Array Generation with Signal Coupling Constraints2013

    • Author(s)
      Gong Chen, Jing Li, Bo Yang, Qing Dong, Shigetoshi Nakatake
    • Organizer
      The 2013 International Conference on Integrated Circuits, Design, and Verification
    • Place of Presentation
      Ho Chi Minh
    • Related Report
      2013 Research-status Report
  • [Presentation] 容量充電式の独立電源を伴う低消費電力オペアンプ動作に関する考察2013

    • Author(s)
      森山新平
    • Organizer
      情報処理学会 システムLSI設計メソドロジー研究会
    • Place of Presentation
      長崎県・対馬
    • Related Report
      2012 Research-status Report
  • [Presentation] Practicality on Placement Given by Optimality of Packing2013

    • Author(s)
      中武繁寿
    • Organizer
      ACM International Symposium on Physical Design
    • Place of Presentation
      米国・ネバダ州・ステートライン
    • Related Report
      2012 Research-status Report
    • Invited
  • [Presentation] High Routability and Low Ratio Mimatch Driven Common-Centroid Capacitor Array Generation2012

    • Author(s)
      中武繁寿
    • Organizer
      IEEE Variability, Characterization and Modeling 2012
    • Place of Presentation
      米国・カリフォルニア州・サンノゼ
    • Related Report
      2012 Research-status Report
  • [Presentation] トランジスタ・アレイ方式に基づくアナログレイアウトの高速プロトタイプ技術2012

    • Author(s)
      中武繁寿
    • Organizer
      電気学会電子回路研究会
    • Place of Presentation
      東京理科大学
    • Related Report
      2012 Research-status Report
  • [Presentation] A Comparator Energy Model Considering Shallow Trench Isolation Stress by Geometric Programming2012

    • Author(s)
      陳功
    • Organizer
      電子情報通信学会 VLSI設計技術研究会
    • Place of Presentation
      北九州国際会議場
    • Related Report
      2012 Research-status Report

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Published: 2013-05-31   Modified: 2019-07-29  

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