Research on Large-capacity, Low-power Shift-register-based Memories Based on Single-flux-quantum Logic Circuits
| Project/Area Number |
24760276
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Multi-year Fund |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Nagoya University |
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Principal Investigator |
TANAKA Masamitsu 名古屋大学, PhD登龍門推進室(工), 特任講師 (10377864)
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| Project Period (FY) |
2012-04-01 – 2015-03-31
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| Project Status |
Completed (Fiscal Year 2014)
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| Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2014: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2013: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2012: ¥2,340,000 (Direct Cost: ¥1,800,000、Indirect Cost: ¥540,000)
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| Keywords | 超伝導 / 集積回路 / 単一磁束量子回路 / SFQ回路 / メモリ / 低消費電力 / エネルギ高効率 / 単一磁束量子 / エネルギ効率 / 高密度 / 高エネルギ効率 |
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| Outline of Final Research Achievements |
The research on large-capacity, low-power shift-register-based memories was done toward realization of high-performance computing system based on the single-flux-quantum logic technology. A compact, low-power shift-register cell was newly developed. The low-voltage circuit design technique was established, which is applicable to not only the shift-register-based memories but also to general circuits, achieving high energy efficiency. These results supports the feasibility of a few kilobits, ultra-high-speed memories with reasonable density and power consumption.
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Report
(4 results)
Research Products
(29 results)
