| Budget Amount *help |
¥4,420,000 (Direct Cost: ¥3,400,000、Indirect Cost: ¥1,020,000)
Fiscal Year 2014: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2013: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2012: ¥2,340,000 (Direct Cost: ¥1,800,000、Indirect Cost: ¥540,000)
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| Outline of Final Research Achievements |
The research on large-capacity, low-power shift-register-based memories was done toward realization of high-performance computing system based on the single-flux-quantum logic technology. A compact, low-power shift-register cell was newly developed. The low-voltage circuit design technique was established, which is applicable to not only the shift-register-based memories but also to general circuits, achieving high energy efficiency. These results supports the feasibility of a few kilobits, ultra-high-speed memories with reasonable density and power consumption.
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