Design of the super high reliability digital circuit in consideration of operation environment
| Project/Area Number |
25330068
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | Tokyo Metropolitan University |
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Principal Investigator |
Miura Yukiya 首都大学東京, システムデザイン研究科, 教授 (00254152)
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| Project Period (FY) |
2013-04-01 – 2017-03-31
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| Project Status |
Completed (Fiscal Year 2016)
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| Budget Amount *help |
¥4,810,000 (Direct Cost: ¥3,700,000、Indirect Cost: ¥1,110,000)
Fiscal Year 2016: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000)
Fiscal Year 2015: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2014: ¥1,950,000 (Direct Cost: ¥1,500,000、Indirect Cost: ¥450,000)
Fiscal Year 2013: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000)
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| Keywords | ディペンダブルコンピューティング / ノイズ / 誤動作 / 同期式回路 / フリップフロップ / 高信頼化設計 / ディペンダブルコンピュー ティング / メモリ / 更信頼化設計 |
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| Outline of Final Research Achievements |
In this project, we have developed countermeasures for malfunctions of LSIs and an estimation method for performance degradation by aging, which are caused by environments of LSI usage.
(1) Behaviors of flip-flops (FFs) by power supply noise are analyzed first, and then, we identified that the error of the bit-flip like memories occurs. We also clarified mechanisms of error occurrences, and then developed circuit structures of FFs to prevent error occurrence.
(2) We developed a method for estimating aging of LSIs by using two kinds of ring oscillators. The method could estimate aging from the transistor level to the circuit level.
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Report
(5 results)
Research Products
(2 results)
