| Project/Area Number |
25330279
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Research Field |
Soft computing
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| Research Institution | Tohoku University |
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Principal Investigator |
Sato Shigeo 東北大学, 電気通信研究所, 教授 (10282013)
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| Co-Investigator(Kenkyū-buntansha) |
NAKAJIMA KOJI 東北大学, 電気通信研究所, 教授 (60125622)
ONOMI TAKESHI 東北大学, 電気通信研究所, 助教 (70312676)
AKIMA HISANAO 東北大学, 電気通信研究所, 助教 (40707840)
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| Project Period (FY) |
2013-04-01 – 2016-03-31
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| Project Status |
Completed (Fiscal Year 2015)
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| Budget Amount *help |
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2015: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2014: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2013: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
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| Keywords | 脳型計算機 / ニューロチップ / シナプスデバイス / フローティングゲートメモリ / フローティングゲートメモ リ |
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| Outline of Final Research Achievements |
To develop a practical brain computer, we have studied a nanosized synapse device composed of a floating-gate memory and a vertical MOS transistor, which is necessary for huge integration, and its compatibility with neuron and learning circuits. As a result, we have developed poly Si thin film deposition process for floating gate electrodes and fabrication process of vertical MOS transistors, and optimized each process parameters. Furthermore, we estimated the performance of a nanosized synapse device and confirmed its effectiveness and problems in application to large scale neural networks.
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