| Project/Area Number |
25420332
|
|---|
| Research Category |
Grant-in-Aid for Scientific Research (C)
|
| Allocation Type | Multi-year Fund |
|---|
| Section | 一般 |
|---|
| Research Field |
Electron device/Electronic equipment
|
|---|
| Research Institution | Hiroshima University |
|---|
Principal Investigator |
|
|---|
| Project Period (FY) |
2013-04-01 – 2016-03-31
|
| Project Status |
Completed (Fiscal Year 2015)
|
| Budget Amount *help |
¥5,200,000 (Direct Cost: ¥4,000,000、Indirect Cost: ¥1,200,000)
Fiscal Year 2015: ¥650,000 (Direct Cost: ¥500,000、Indirect Cost: ¥150,000)
Fiscal Year 2014: ¥3,640,000 (Direct Cost: ¥2,800,000、Indirect Cost: ¥840,000)
Fiscal Year 2013: ¥910,000 (Direct Cost: ¥700,000、Indirect Cost: ¥210,000)
|
|---|
| Keywords | 電子デバイス・集積回路 / パターンマッチング / 特徴抽出 / 連想メモリ / 認識 / VLSI |
|---|
| Outline of Final Research Achievements |
Clock-number mapping of Euclidean distance was investigated for low-power, fully-digital and word-parallel realization of minimum-distance search, which is important for object recognition in mobile applications. Previously, a practical solution for this problem was unknown. By minimizing square-calculation hardware and clock-cycle number for all search cases, a reliable and high-speed integrated-circuit solution was developed. A 180 nm CMOS prototype for 32 16-dimensional reference vectors demonstrated fast search time of 1.2 micro seconds and low power dissipation of 8.8 mW, meaning 10000 times higher energy efficiency than with advanced microprocessors (Intel i7-3970x). The concept was extended to SURF feature-vector extraction and sliding-window technique for object recognition in images. Another 65 nm CMOS prototype achieved real-time object detection in VGA (640x480 pixels) videos at 0.94 mJ energy consumption per frame, which is 8.7 times better than the best previous work.
|
