Research on low power mixed signal LSI with novel quantizer

• Project/Area Number: 25420345
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: Tokyo City University
• Principal Investigator: SAN HAO 東京都市大学, 知識工学部, 准教授 (30400774)
• Project Period (FY): 2013-04-01 – 2016-03-31
• Project Status: Completed (Fiscal Year 2015)
• Budget Amount: ¥5,070,000 (Direct Cost: ¥3,900,000、Indirect Cost: ¥1,170,000); Fiscal Year 2015: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000); Fiscal Year 2014: ¥3,120,000 (Direct Cost: ¥2,400,000、Indirect Cost: ¥720,000); Fiscal Year 2013: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
• Keywords: ADC / アナログ集積回路 / 集積回路 / AD変換器回路 / 混載信号処理回路 / AD変換回路

Outline of Final Research Achievements

This research propose a novel mixed signal processing LSI of multi-bit ΔAD modulator for low power and high signal-to-noise-and distortion (SNDR) application. The integrators in the modulator are realized by ring amplifier without static current. Multi-bit quantizer and analog adder in the feedforward modulator is realized by a passive-adder embedded successive approximation register (SAR) analog-to-digital converter (ADC) which consists of capacitor array and a dynamic comparator. The dynamic comparator does not dissipate static power at all when a preamplifier is not used. Proposed modulator is fabricated in TSMC 90nm CMOS technology. Measurement results show the feasibility of proposed circuit architecture.

Research Products

• [Journal Article] 逐次比較量子化器とリングアンプを用いるΔΣAD変調器 (2016)
  • Author(s): 潘 春暉, 傘 昊
  • Journal Title: 電子情報通信学会論文誌A Volume: J99-A，No.8
  • Peer Reviewed / Acknowledgement Compliant
• [Journal Article] Robust Cyclic ADC Architecture Based on <i>&beta;</i>-Expansion (2013)
  • Author(s): R. Suzuki, T. Maruyama, H. San, K. Aihara, M. Hotta
  • Journal Title: IEICE Transactions on Electronics Volume: E96.C Issue: 4 Pages: 553-559
  • DOI: 10.1587/transele.E96.C.553
  • NAID: 10031182832
  • ISSN: 0916-8524, 1745-1353
  • Peer Reviewed
• [Presentation] 静電気放電保護回路のリーク電流低減手法の検討 (2016)
  • Author(s): 陳 広謙,北島 敦,新井義明,山下 順,伊藤 壽,傘 昊
  • Organizer: 電気学会 電子回路研究会
  • Place of Presentation: 東京都市大学世田谷キャンパス(東京)
  • Year and Date: 2016-03-07
• [Presentation] A Low-Distortion Delta-Sigma Modulator with Ring Ampli er and Passive Adder Embedded SAR Quantizer (2015)
  • Author(s): C. Pan and H. San
  • Organizer: The 2015 International Symposium on Intelligent Signal Processing and Communication Systems
  • Place of Presentation: Bali, Indonesia
  • Year and Date: 2015-11-09
  • Int'l Joint Research
• [Presentation] 逐次比較量子化器とリングアンプを用いる△ΣAD変調器の検討 (2015)
  • Author(s): 潘 春暉, 傘 昊
  • Organizer: 電子情報通信学会 第28回 回路とシステムワークショップ
  • Place of Presentation: 淡路夢舞台国際会議場(兵庫)
  • Year and Date: 2015-08-03
• [Presentation] A 10-bit Pipelined Cyclic ADC Based on β-Expansion (2014)
  • Author(s): T. Yamada, T. Matsuura, H. San and M. Hotta
  • Organizer: 2014 International Conference on Analog VLSI Circuits
  • Place of Presentation: Ho Chi Minh City, Vietnam
  • Year and Date: 2014-10-20 – 2014-10-24
• [Presentation] β展開に基づくサイクリックADCのβ値推定誤差に関する検討 (2014)
  • Author(s): 内田順平, 竹山遼, 山田俊毅, 吉田昂右, 堀田正生, 傘昊, 松浦達治
  • Organizer: 2014電子情報通学会ソサイエティ大会
  • Place of Presentation: 徳島
  • Year and Date: 2014-09-23 – 2014-09-26
• [Presentation] β展開に基づくADC用オペアンプ回路の検討 (2014)
  • Author(s): 吉田昂右,菅原論平,山田俊毅,松浦達治,傘 昊,堀田正生
  • Organizer: 電気学会・電子回路研究会
  • Place of Presentation: 金沢
• [Remarks] 東京都市大学 研究者情報 研究業績
  • URL: http://www.risys.gl.tcu.ac.jp/Main.php?action=01&type=detail&tchCd=5001801