Study on LSI design methods for security and testability
Project/Area Number |
25540020
|
Research Category |
Grant-in-Aid for Challenging Exploratory Research
|
Allocation Type | Multi-year Fund |
Research Field |
Computer system
|
Research Institution | Kyoto Sangyo University (2014) Kyushu University (2013) |
Principal Investigator |
|
Project Period (FY) |
2013-04-01 – 2015-03-31
|
Project Status |
Completed (Fiscal Year 2014)
|
Budget Amount *help |
¥3,770,000 (Direct Cost: ¥2,900,000、Indirect Cost: ¥870,000)
Fiscal Year 2014: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
Fiscal Year 2013: ¥2,210,000 (Direct Cost: ¥1,700,000、Indirect Cost: ¥510,000)
|
Keywords | 安全 / 信頼性 / LSI設計技術 / 暗号LSI / 製造テスト / テストパタン生成 / テスト容易化設計 / 秘密情報 / スキャン設計 / 製造検査容易性 / 動作合成 / 設計手法 / LSI / 製造検査 / 情報漏洩 / 情報量 |
Outline of Final Research Achievements |
The scan design method makes it possible to increase testability. Scan-based Attacks with scan design decrease security for confidential information on LSIs. Conventional methods provide assurance of security with complicated scan designs. If information about complicated scan designs, attackers could obtain confidential information on LSIs by using scan-based attacks. Complicated scan designs is a novel confidential information. We proposed a design method with both testability and security without depending on complicated scan designs. The proposed method is a design method which ensures testability on behavior level testability without scan design. Several designs were applied to the proposed methods. We measured quantitatively the security for the designs applied to the proposed method. The measure for security evaluation is mutual information.
|
Report
(3 results)
Research Products
(9 results)