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Basic research on ultra-low voltage MOS transistors aiming at sub-100mV operation

Research Project

Project/Area Number 25630135
Research Category

Grant-in-Aid for Challenging Exploratory Research

Allocation TypeSingle-year Grants
Research Field Electron device/Electronic equipment
Research InstitutionThe University of Tokyo

Principal Investigator

HIRAMOTO Toshiro  東京大学, 生産技術研究所, 教授 (20192718)

Co-Investigator(Renkei-kenkyūsha) SARAYA Takuya  東京大学, 生産技術研究所, 助手 (90334367)
Project Period (FY) 2013-04-01 – 2014-03-31
Project Status Completed (Fiscal Year 2013)
Budget Amount *help
¥4,030,000 (Direct Cost: ¥3,100,000、Indirect Cost: ¥930,000)
Fiscal Year 2013: ¥4,030,000 (Direct Cost: ¥3,100,000、Indirect Cost: ¥930,000)
Keywords電子デバイス・集積回路 / 超低エネルギー / 半導体物性 / MOSトランジスタ / 大規模集積回路 / 超低消費電力 / サブスレッショルド / 電子デバイス・機器 / 低消費電力
Research Abstract

The objective of this research is to develop a semiconductor device operating at as low as 100mV. In order to obtain high on/off ratio at low voltage, a MOS transistor with a floating gate is proposed, where threshold voltage (Vth) automatically decreases in the ON state while Vth increases in the OFF state. The device was actually fabricated, and the decrease in Vth in the ON state and the increase in Vth in the OFF stage was demonstrated at as low as 100mV. It was also demonstrated that the stability of an SRAM cell was improved at 100mV.

Report

(2 results)
  • 2013 Annual Research Report   Final Research Report ( PDF )
  • Research Products

    (2 results)

All 2014

All Presentation (2 results)

  • [Presentation] Ultra-Low Voltage (0.1V) Operation of Vth Self-Adjusting MOSFET and SRAM Cell2014

    • Author(s)
      Akitsugu Ueda, Seung-Min Jung, Tomoko Mizutani, Anil Kumar, Takuya Saraya, and Toshiro Hiramoto
    • Organizer
      VLSI Symposium on Technology
    • Place of Presentation
      Hilton Hawaiian Village, Honolulu, HI. USA
    • Year and Date
      2014-06-12
    • Related Report
      2013 Final Research Report
  • [Presentation] Ultra-Low Voltage (0.1V) Operation of Vth Self-Adjusting MOSFET and SRAM Cell2014

    • Author(s)
      Akitsugu Ueda, Seung-Min Jung, Tomoko Mizutani, Anil Kumar, Takuya Saraya, and Toshiro Hiramoto
    • Organizer
      VLSI Symposium on Technology
    • Place of Presentation
      Honolulu, HI. USA
    • Related Report
      2013 Annual Research Report

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Published: 2014-07-25   Modified: 2016-11-25  

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