Performance-scalable reconfigurable system based on tightly-coupled reconfigurable devices
Project/Area Number |
25730032
|
Research Category |
Grant-in-Aid for Young Scientists (B)
|
Allocation Type | Multi-year Fund |
Research Field |
Computer system
|
Research Institution | Kochi University of Technology |
Principal Investigator |
|
Project Period (FY) |
2013-04-01 – 2016-03-31
|
Project Status |
Completed (Fiscal Year 2015)
|
Budget Amount *help |
¥3,510,000 (Direct Cost: ¥2,700,000、Indirect Cost: ¥810,000)
Fiscal Year 2015: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2014: ¥1,040,000 (Direct Cost: ¥800,000、Indirect Cost: ¥240,000)
Fiscal Year 2013: ¥1,170,000 (Direct Cost: ¥900,000、Indirect Cost: ¥270,000)
|
Keywords | 再構成可能システム / 開発環境 / FPGA / プロトタイピング / 高性能計算 |
Outline of Final Research Achievements |
This project aimed at realization of performance-scalable reconfigurable system based on tightly-coupled reconfigurable devices. Specifically,the following research issues are tackled. 1) a development of evaluation platform for a coarse-grained reconfigurable architecture exploration and its demonstration, 2) a development of an FPGA prototyping technique for tightly-coupled coarse-grained reconfigurable chips, and 3) an experimental measurement of performance variation on commercial FPGAs under various operating conditions.
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Report
(4 results)
Research Products
(15 results)