Research on low-power motion estimation architecture for HEVC
| Project/Area Number |
25870816
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Multi-year Fund |
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| Research Field |
Communication/Network engineering
Electron device/Electronic equipment
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| Research Institution | Waseda University |
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Principal Investigator |
ZHOU DAJIANG 早稲田大学, 理工学術院, 助教 (10607336)
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| Project Period (FY) |
2013-04-01 – 2016-03-31
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| Project Status |
Completed (Fiscal Year 2015)
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| Budget Amount *help |
¥4,290,000 (Direct Cost: ¥3,300,000、Indirect Cost: ¥990,000)
Fiscal Year 2015: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2014: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2013: ¥1,560,000 (Direct Cost: ¥1,200,000、Indirect Cost: ¥360,000)
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| Keywords | 動き予測 / 動画像 / 符号化 / 低消費電力 / UHDTV |
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| Outline of Final Research Achievements |
New compression technologies are highly desirable to accommodate new video specifications such as 4K and 8K. The new international video coding standard H.265/HEVC, finalized in 2013, is capable of delivering a compression ratio of 200 times. However, the high compression ratio is achieved by employing many new and computation intensive features, which significantly increases the difficulty in realizing low-energy-consumption implementations. By developing efficient algorithms and architectures, this research aims at a remarkable reduction of energy consumption of motion estimation, which is the most energy consuming component of HEVC video compression. Through a series of innovative technologies such as integer and fractional motion estimation algorithms, alternating asymmetric search range assignment and mode filtering, this research has successfully reduced over 75% of energy consumption for an implementation of HEVC compression.
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Report
(4 results)
Research Products
(26 results)
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[Presentation] A 4Gpixel/s 8/10b H.265/HEVC video decoder chip for 8K Ultra HD applications2016
Author(s)
Dajiang Zhou, Shihao Wang, Heming Sun, Jianbin Zhou, Jiayi Zhu, Yijin Zhao, Jinjia Zhou, Shuping Zhang, Shinji Kimura, Takeshi Yoshimura, and Satoshi Goto
Organizer
IEEE International Solid-State Circuits Conference (ISSCC)
Place of Presentation
San Francisco
Year and Date
2016-01-31
Related Report
Int'l Joint Research
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