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A Study on Energy Harvesting Embedded Computers as a Social Infrastructure

Research Project

Project/Area Number 26280013
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypePartial Multi-year Fund
Section一般
Research Field Computer system
Research InstitutionKyoto University

Principal Investigator

Ishihara Tohru  京都大学, 情報学研究科, 准教授 (30323471)

Co-Investigator(Kenkyū-buntansha) 土谷 亮  京都大学, 情報学研究科, 助教 (20432411)
小野寺 秀俊  京都大学, 情報学研究科, 教授 (80160927)
Project Period (FY) 2014-04-01 – 2017-03-31
Project Status Completed (Fiscal Year 2016)
Budget Amount *help
¥16,770,000 (Direct Cost: ¥12,900,000、Indirect Cost: ¥3,870,000)
Fiscal Year 2016: ¥4,940,000 (Direct Cost: ¥3,800,000、Indirect Cost: ¥1,140,000)
Fiscal Year 2015: ¥7,930,000 (Direct Cost: ¥6,100,000、Indirect Cost: ¥1,830,000)
Fiscal Year 2014: ¥3,900,000 (Direct Cost: ¥3,000,000、Indirect Cost: ¥900,000)
Keywords低消費電力設計 / 電子デバイス・機器 / 低消費電力・高エネルギー密度 / エネルギー効率化 / 計算機システム / システムオンチップ / 省エネルギー / スマートセンサ情報システム
Outline of Final Research Achievements

We have developed a microprocessor system running with unstable power sources such as a photovoltaic power supply system. The microprocessor has a functionality to stably run with very low supply voltages down to 0.3V. We have fabricated several microprocessor chips integrating our idea for saving the energy dissipation, which demonstrated the energy efficiency of our idea integrated on the chip. We also developed a technique of tuning supply voltage and threshold voltage simultaneously, which minimizes the energy consumption per performance of the microprocessor. The voltage tuning technique works effectively on the microprocessor chips fabricated. We have obtained several awards such as IPSJ Yamashita Memorial Award and IEEE SOCC Best Paper Award which are given for the achievements in this research project.

Report

(4 results)
  • 2016 Annual Research Report   Final Research Report ( PDF )
  • 2015 Annual Research Report
  • 2014 Annual Research Report
  • Research Products

    (32 results)

All 2017 2016 2015 2014

All Journal Article (3 results) (of which Peer Reviewed: 3 results,  Open Access: 2 results,  Acknowledgement Compliant: 3 results) Presentation (29 results) (of which Int'l Joint Research: 12 results,  Invited: 4 results)

  • [Journal Article] Analytical Stability Modeling for CMOS Latches in Low Voltage Operation2016

    • Author(s)
      Tatsuya Kamakari, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E99.A Issue: 12 Pages: 2463-2472

    • DOI

      10.1587/transfun.E99.A.2463

    • NAID

      130005170525

    • ISSN
      0916-8508, 1745-1337
    • Related Report
      2016 Annual Research Report
    • Peer Reviewed / Open Access / Acknowledgement Compliant
  • [Journal Article] Statistical Timing Modeling Based on a Lognormal Distribution Model for Near-Threshold Circuit Optimization2015

    • Author(s)
      Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: E98.A Issue: 7 Pages: 1455-1466

    • DOI

      10.1587/transfun.E98.A.1455

    • NAID

      130005085789

    • ISSN
      0916-8508, 1745-1337
    • Related Report
      2015 Annual Research Report
    • Peer Reviewed / Open Access / Acknowledgement Compliant
  • [Journal Article] Statistical Timing Modeling Based on a Lognormal Distribution Model for Near-Threshold Circuit Optimization2015

    • Author(s)
      Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

      Volume: Vol. E98-A

    • NAID

      130005085789

    • Related Report
      2014 Annual Research Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Presentation] On-Chip Temperature and Process Variation Sensing using a Reconfigurable Ring Oscillator2017

    • Author(s)
      Tadashi Kishimoto, Tohru Ishihara, and Hidetoshi Onodera
    • Organizer
      International Symposium on VLSI Design, Automation and Test
    • Place of Presentation
      Shinchu, Taiwan
    • Year and Date
      2017-04-24
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Minimum Energy Point Tracking under a Wide Range of PVT Conditions2016

    • Author(s)
      Shu Hokimoto, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      The 20th Workshop on Synthesis And System Integration of Mixed Information technologies
    • Place of Presentation
      京都リサーチパーク、京都府京都市
    • Year and Date
      2016-10-24
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] A Processor Architecture Integrating Voltage Scalable On-Chip Memories for Individual Tracking of Minimum Energy Points in Logic and Memory2016

    • Author(s)
      Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      The 20th Workshop on Synthesis And System Integration of Mixed Information technologies
    • Place of Presentation
      京都リサーチパーク、京都府京都市
    • Year and Date
      2016-09-24
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Fully Digital On-Chip Memory Using Minimum Height Standard Cells for Near-Threshold Voltage Computing2016

    • Author(s)
      Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      International Workshop on Power and Timing Modeling, Optimization and Simulation
    • Place of Presentation
      Bremen, Germany
    • Year and Date
      2016-09-21
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] 広範囲な動作性能領域においてエネルギー最小点追跡を可能にするオンチップメモリ2016

    • Author(s)
      塩見準、石原亨、小野寺秀俊
    • Organizer
      情報処理学会DAシンポジウム
    • Place of Presentation
      山代温泉 ゆのくに天祥、石川県加賀市
    • Year and Date
      2016-09-14
    • Related Report
      2016 Annual Research Report
  • [Presentation] プロセッサにおける電源電圧と基板電圧の同時調節によるエネルギー最小点追跡手法2016

    • Author(s)
      保木本修、石原亨、小野寺秀俊
    • Organizer
      情報処理学会DAシンポジウム
    • Place of Presentation
      山代温泉 ゆのくに天祥、石川県加賀市
    • Year and Date
      2016-09-14
    • Related Report
      2016 Annual Research Report
  • [Presentation] 回路トポロジー可変なリングオシレータを用いたプロセス変動量と動作温度の推定方法2016

    • Author(s)
      岸本真、石原亨、小野寺秀俊
    • Organizer
      情報処理学会DAシンポジウム
    • Place of Presentation
      山代温泉 ゆのくに天祥、石川県加賀市
    • Year and Date
      2016-09-14
    • Related Report
      2016 Annual Research Report
  • [Presentation] Minimum Energy Point Tracking Using Combined Dynamic Voltage Scaling and Adaptive Body Biasing2016

    • Author(s)
      Shu Hokimoto, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      IEEE International System-on-Chip Conference
    • Place of Presentation
      Seattle, USA
    • Year and Date
      2016-09-06
    • Related Report
      2016 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Guidelines for Effective and Simplified Dynamic Supply and Threshold Voltage Scaling2016

    • Author(s)
      Toshihiro Takeshita, Tohru ISHIHARA, Hidetoshi Onodera
    • Organizer
      International Symposium on VLSI Design, Automation and Test
    • Place of Presentation
      Hsinchu, Taiwan
    • Year and Date
      2016-04-25
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] CMOS LSIにおけるエネルギー最小点追跡のための電源電圧としきい値電圧の動的調節指針2016

    • Author(s)
      竹下俊宏, 塩見準,石原亨,小野寺秀俊
    • Organizer
      情報処理学会 システムLSI設計技術研究会 研究報告, 2016-SLDM-175(32)
    • Place of Presentation
      福江文化会館、長崎県福江市
    • Year and Date
      2016-03-24
    • Related Report
      2015 Annual Research Report
  • [Presentation] Variability- and Correlation-Aware Logical Effort for Near-Threshold Circuit Design2016

    • Author(s)
      Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      International Symposium on Quality Electronic Design
    • Place of Presentation
      Santa Clara, California, USA
    • Year and Date
      2016-03-15
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] A Closed-Form Stability Model for Cross-Coupled Inverters Operating in Sub-Threshold Voltage Region2016

    • Author(s)
      Tatsuya Kamakari, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      Asia and South Pacific Design Automation Conference
    • Place of Presentation
      Sands Cotai, Macau
    • Year and Date
      2016-01-26
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Slew- and Variability-Aware Logical Effort for Near-Threshold Circuit Design2015

    • Author(s)
      Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      International Workshop on Variability Modeling and Characterization
    • Place of Presentation
      San Jose, California, USA
    • Year and Date
      2015-11-05
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] サブスレッショルド領域におけるラッチ回路の動作安定性モデル2015

    • Author(s)
      鎌苅竜也,塩見準,石原亨,小野寺秀俊
    • Organizer
      情報処理学会DAシンポジウム2015
    • Place of Presentation
      温泉ゆのくに天祥、石川県加賀市
    • Year and Date
      2015-08-26
    • Related Report
      2015 Annual Research Report
  • [Presentation] 統計的タイミングモデルに基づくニアスレッショルド回路のゲートサイジング2015

    • Author(s)
      塩見準,石原亨,小野寺秀俊
    • Organizer
      情報処理学会DAシンポジウム2015
    • Place of Presentation
      温泉ゆのくに天祥、石川県加賀市
    • Year and Date
      2015-08-26
    • Related Report
      2015 Annual Research Report
  • [Presentation] Practical Supply and Threshold Voltage Scaling for Energy Efficient Operation of Microprocessors2015

    • Author(s)
      Tohru Ishihara
    • Organizer
      International Forum on Embedded MPSoC and Multicore
    • Place of Presentation
      Ventura, California, USA
    • Year and Date
      2015-07-13
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] Practical Supply and Threshold Voltage Scaling for Energy Efficient Operation of Microprocessors2015

    • Author(s)
      Tohru Ishihara
    • Organizer
      International Forum on FDSOI IC Design
    • Place of Presentation
      Grenoble, France
    • Year and Date
      2015-06-22
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] An impact of process variation on supply voltage dependence of logic path delay variation2015

    • Author(s)
      S. Nishizawa, T. Ishihara, H. Onodera
    • Organizer
      International Symposium on VLSI Design, Automation and Test
    • Place of Presentation
      Hsinchu, Taiwan
    • Year and Date
      2015-04-27
    • Related Report
      2015 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Energy Reduction by Built-in Body Biasing with Single Supply Voltage Operation2015

    • Author(s)
      Norihiro Kamae, Akira Tsuchiya, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      International Symposium on Quality Electronic Design
    • Place of Presentation
      San Jose, California, USA
    • Year and Date
      2015-03-03 – 2015-03-04
    • Related Report
      2014 Annual Research Report
  • [Presentation] ニアスレッショルド回路設計のための基本定理2015

    • Author(s)
      塩見準,石原亨,小野寺秀俊
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      沖縄県青年会館、沖縄県那覇市
    • Year and Date
      2015-03-02 – 2015-03-04
    • Related Report
      2014 Annual Research Report
  • [Presentation] 電源電圧としきい値電圧の同時最適化が集積回路の消費エネルギーに与える影響の解析2015

    • Author(s)
      竹下俊宏、西澤真一、Islam AKM Mahfuzul、石原 亨、小野寺秀俊
    • Organizer
      電子情報通信学会VLSI設計技術研究会
    • Place of Presentation
      慶應義塾大学日吉キャンパス来往舎、神奈川県横浜市
    • Year and Date
      2015-01-29
    • Related Report
      2014 Annual Research Report
  • [Presentation] Microarchitectural-Level Statistical Timing Models for Near-Threshold Circuit Design2015

    • Author(s)
      Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      20th Asia and South Pacific Design Automation Conference
    • Place of Presentation
      幕張メッセ、千葉県千葉市
    • Year and Date
      2015-01-19 – 2015-01-22
    • Related Report
      2014 Annual Research Report
  • [Presentation] A Lognormal Timing Model and Design Guidelines for Near-Threshold Circuits2014

    • Author(s)
      Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      International Workshop on Variability Modeling and Charactorization
    • Place of Presentation
      San Jose, California, USA
    • Year and Date
      2014-11-06
    • Related Report
      2014 Annual Research Report
  • [Presentation] Design Methodology of Process Variation Tolerant D-Flip-Flops for Low Voltage Circuit Operation2014

    • Author(s)
      Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      IEEE International System-On-Chip Conference
    • Place of Presentation
      Las Vegas, Nevada, USA
    • Year and Date
      2014-09-02 – 2014-09-05
    • Related Report
      2014 Annual Research Report
  • [Presentation] Variation-Aware Flip-Flop Energy Optimization for Ultra Low Voltage Operation2014

    • Author(s)
      Tatsuya Kamakari, Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
    • Organizer
      IEEE International System-On-Chip Conference
    • Place of Presentation
      Las Vegas, Nevada, USA
    • Year and Date
      2014-09-02 – 2014-09-05
    • Related Report
      2014 Annual Research Report
  • [Presentation] PLLの物理レイアウト自動生成を目指した設計手法2014

    • Author(s)
      釡江 典裕, 土谷 亮, 石原 亨, 小野寺 秀俊
    • Organizer
      情報処理学会DAシンポジウム2014
    • Place of Presentation
      ホテル下呂温泉水明館、岐阜県下呂市
    • Year and Date
      2014-08-28 – 2014-08-29
    • Related Report
      2014 Annual Research Report
  • [Presentation] 製造ばらつきを考慮した極低電圧動作向けフリップフロップの設計手法2014

    • Author(s)
      鎌苅竜也,西澤真一,石原亨,小野寺秀俊
    • Organizer
      情報処理学会DAシンポジウム2014
    • Place of Presentation
      ホテル下呂温泉水明館、岐阜県下呂市
    • Year and Date
      2014-08-28 – 2014-08-29
    • Related Report
      2014 Annual Research Report
  • [Presentation] 電源電圧に応じてトランジスタサイズを最適化可能なセルライブラリの生成システム2014

    • Author(s)
      西澤真一, 石原 亨, 小野寺秀俊
    • Organizer
      情報処理学会DAシンポジウム2014
    • Place of Presentation
      ホテル下呂温泉水明館、岐阜県下呂市
    • Year and Date
      2014-08-28 – 2014-08-29
    • Related Report
      2014 Annual Research Report
  • [Presentation] Near-Threshold Computing on Heterogeneous Multicore Architectures2014

    • Author(s)
      Tohru Ishihara
    • Organizer
      14th International Forum on Embedded MPSoC and Multicore
    • Place of Presentation
      Margaux, France
    • Year and Date
      2014-07-07 – 2014-07-11
    • Related Report
      2014 Annual Research Report
    • Invited

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Published: 2014-04-04   Modified: 2018-03-22  

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