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Studies on Reliability Enhancement of Circuits Programmed on FPGAs

Research Project

Project/Area Number 26330067
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Computer system
Research InstitutionOita University

Principal Investigator

Ohtake Satoshi  大分大学, 理工学部, 准教授 (20314528)

Research Collaborator SATO Shuichi  
MORIYASU Takanori  
HONDA Taro  
ONO Renji  
KANO Sho  
SAWAKI Kosuke  
UEDA Hiroki  
SHIMAZU Daichi  
MINAMIZONO Hayato  
WATANABE Kyonosuke  
Project Period (FY) 2014-04-01 – 2018-03-31
Project Status Completed (Fiscal Year 2017)
Budget Amount *help
¥4,810,000 (Direct Cost: ¥3,700,000、Indirect Cost: ¥1,110,000)
Fiscal Year 2016: ¥1,300,000 (Direct Cost: ¥1,000,000、Indirect Cost: ¥300,000)
Fiscal Year 2015: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2014: ¥2,080,000 (Direct Cost: ¥1,600,000、Indirect Cost: ¥480,000)
KeywordsFPGA / フィールドテスト / 特定用途依存テスト / 遅延故障 / 故障診断 / BIST / 対故障設計 / 劣化検知 / 耐故障設計 / FPGA / BIST / 劣化検
Outline of Final Research Achievements

Recently, production cost of small quantity production of integrated circuits tends to increase. For reduction of production cost, instead of producing a small amount of application specific integrated circuits, field programmable gate arrays (FPGAs) are expected to be used even for critical application fields.
We conducted studies on reliability enhancement of FPGAs and proposed several techniques to test integrated circuits programmed on the FPGAs in-field.

Report

(5 results)
  • 2017 Annual Research Report   Final Research Report ( PDF )
  • 2016 Research-status Report
  • 2015 Research-status Report
  • 2014 Research-status Report
  • Research Products

    (14 results)

All 2017 2016 2015 2014

All Journal Article (8 results) (of which Peer Reviewed: 4 results,  Acknowledgement Compliant: 7 results) Presentation (6 results) (of which Int'l Joint Research: 1 results)

  • [Journal Article] 遅延故障BIST 高品質化のためのLFSR シード生成法2017

    • Author(s)
      渡邊恭之介,大竹哲史
    • Journal Title

      電子情報通信学会技術報告

      Volume: 117 Pages: 49-54

    • Related Report
      2017 Annual Research Report
  • [Journal Article] An approach to LFSR-based X-masking for built-in self-test2017

    • Author(s)
      Daichi Shimazu and Satoshi Ohtake
    • Journal Title

      Proceedings of 18th IEEE Latin American Test Symposium

      Volume: - Pages: 1-4

    • DOI

      10.1109/latw.2017.7906741

    • Related Report
      2016 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] A delay measurement mechanism for asynchronous circuits of bundled-data model2015

    • Author(s)
      Syuichi Sato and Satoshi Ohtake
    • Journal Title

      Proceedings of IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems 2015

      Volume: なし Pages: 243-248

    • DOI

      10.1109/ddecs.2015.55

    • Related Report
      2015 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] A method of diagnostic test generation for transition faults2015

    • Author(s)
      Renji Ono and Satoshi Ohtake
    • Journal Title

      Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing 2015

      Volume: なし Pages: 273-278

    • DOI

      10.1109/prdc.2015.47

    • Related Report
      2015 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] 遅延故障BIST向けLFSR/MISRシード生成2015

    • Author(s)
      嶋津大地, 大竹哲史
    • Journal Title

      電子情報通信学会技術報告

      Volume: Vol.115, No.339 Pages: 213-218

    • Related Report
      2015 Research-status Report
    • Acknowledgement Compliant
  • [Journal Article] FPGAテストのための耐ソフトエラーBIST2015

    • Author(s)
      上田大樹, 嶋津大地, 大竹哲史
    • Journal Title

      電子情報通信学会技術報告

      Volume: Vol.115, No.339 Pages: 219-224

    • Related Report
      2015 Research-status Report
    • Acknowledgement Compliant
  • [Journal Article] A method of one-pass seed generation for LFSR-based deterministic/pseudo-random testing of static faults2015

    • Author(s)
      Takanori Moriyasu and Satoshi Ohtake
    • Journal Title

      Proceedings of IEEE Latin American Test Symposium

      Volume: なし

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] 階層BIST向けLFSRシード生成法2015

    • Author(s)
      佐脇光亮, 大竹哲史
    • Journal Title

      電子情報通信学会技術報告(DC2014-85)

      Volume: 114 Pages: 43-48

    • Related Report
      2014 Research-status Report
    • Acknowledgement Compliant
  • [Presentation] オンチップ故障診断のためのLFSRシード生成法2016

    • Author(s)
      南薗隼人,大竹哲史
    • Organizer
      電子情報通信学会
    • Place of Presentation
      立命館大学大阪いばらきキャンパス(大阪府茨木市)
    • Year and Date
      2016-11-28
    • Related Report
      2016 Research-status Report
  • [Presentation] A field test architecture for circuits configured on FPGAs2015

    • Author(s)
      Sho Kano and Satoshi Ohtake
    • Organizer
      16th IEEE Workshop on RTL and High Level Testing (WRTLT'15)
    • Place of Presentation
      ムンバイ,インド
    • Year and Date
      2015-11-25
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] 階層BIST向けLFSRシード生成法2015

    • Author(s)
      佐脇光亮, 大竹哲史
    • Organizer
      第72回FTC研究会
    • Place of Presentation
      かんぽの宿山鹿(熊本県山鹿市)
    • Year and Date
      2015-01-22 – 2015-01-24
    • Related Report
      2014 Research-status Report
  • [Presentation] A method of LFSR seed generation for delay fault BIST using constrained ATPG2014

    • Author(s)
      Taro Honda and Satoshi Ohtake
    • Organizer
      14th IEEE Workshop on RTL and High Level Testing
    • Place of Presentation
      Hangzhou Jinxi Hotel (中華人民共和国浙江省杭州市)
    • Year and Date
      2014-11-19 – 2014-11-20
    • Related Report
      2014 Research-status Report
  • [Presentation] A delay measurement mechanism for asynchronous circuits of bundled-data model2014

    • Author(s)
      Shuichi Sato and Satoshi Ohtake
    • Organizer
      14th IEEE Workshop on RTL and High Level Testing
    • Place of Presentation
      Hangzhou Jinxi Hotel (中華人民共和国浙江省杭州市)
    • Year and Date
      2014-11-19 – 2014-11-20
    • Related Report
      2014 Research-status Report
  • [Presentation] FPGA搭載回路のフィールド自己テスト2014

    • Author(s)
      鹿野礁, 大竹哲史
    • Organizer
      第71回FTC研究会
    • Place of Presentation
      かんぽの宿青梅(東京都青梅市)
    • Year and Date
      2014-07-17 – 2014-07-19
    • Related Report
      2014 Research-status Report

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Published: 2014-04-04   Modified: 2019-03-29  

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