| Budget Amount *help |
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2016: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2015: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2014: ¥1,820,000 (Direct Cost: ¥1,400,000、Indirect Cost: ¥420,000)
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| Outline of Final Research Achievements |
In this research, we target to perform manufacturing test for LSI (Large Scale Integrated Circuits) with high quality and low cost while guaranteeing the security of confidential information embedded on LSI. Thus, our purpose is to establish techniques to ensure the reliability and the safety for LSI.
We have proposed synthesis-for-testability and design-for-testability methods at high level of LSI design, a method of easily testable functional information extraction to generate efficient test generation models, test generation methods for low power and test compaction, and a hardware Trojan detection method for three years.
We contributed to the realization of safe LSI testing with high quality and low cost using low hardware overhead.
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