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Research on the design of a fast updatable index generation circuit

Research Project

Project/Area Number 26330072
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Computer system
Research InstitutionMeiji University

Principal Investigator

Sasao Tsutomu  明治大学, 理工学部, 専任教授 (20112013)

Co-Investigator(Renkei-kenkyūsha) IGUCHI Yukihiro  明治大学, 理工学部, 専任教授 (60201307)
Research Collaborator Butler Jon T.  
Project Period (FY) 2014-04-01 – 2018-03-31
Project Status Completed (Fiscal Year 2017)
Budget Amount *help
¥4,680,000 (Direct Cost: ¥3,600,000、Indirect Cost: ¥1,080,000)
Fiscal Year 2016: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2015: ¥1,430,000 (Direct Cost: ¥1,100,000、Indirect Cost: ¥330,000)
Fiscal Year 2014: ¥1,820,000 (Direct Cost: ¥1,400,000、Indirect Cost: ¥420,000)
Keywords国際研究者交流、米国 / 線形関数 / 関数分解 / ルータ / CAM(連想メモリ) / パターンマッチング / 書き換え可能回路 / 国際研究者交流、米 / 5 CAM(連想メモリ) / インデックス生成関数 / CAM(連想メモリ)
Outline of Final Research Achievements

Content Addressable Memories (CAMs) are widely used in the routers for the internet, pattern matching, and cache memories in computers. By using CAMs, a high-speed pattern matching is possible. Unfortunately, CAMs are expensive and dissipate high power. The author invented an index generation unit (IGU) that uses general-purpose memories and small amount of hardware. It works as a CAM, but is much less expensive. In this research, the author developed a fast update method for an IGU.

Report

(5 results)
  • 2017 Annual Research Report   Final Research Report ( PDF )
  • 2016 Research-status Report
  • 2015 Research-status Report
  • 2014 Research-status Report
  • Research Products

    (61 results)

All 2018 2017 2016 2015 2014 Other

All Int'l Joint Research (3 results) Journal Article (17 results) (of which Int'l Joint Research: 3 results,  Peer Reviewed: 17 results,  Acknowledgement Compliant: 14 results) Presentation (32 results) (of which Int'l Joint Research: 22 results,  Invited: 3 results) Book (3 results) Remarks (3 results) Patent(Industrial Property Rights) (3 results) (of which Overseas: 2 results)

  • [Int'l Joint Research] Naval Postgraduate School(米国)

    • Related Report
      2017 Annual Research Report
  • [Int'l Joint Research] Naval Postgraduate School(米国)

    • Related Report
      2016 Research-status Report
  • [Int'l Joint Research] Naval Postgraduate School(米国)

    • Related Report
      2015 Research-status Report
  • [Journal Article] A Fast Updatable Implementation of Index Generation Functions Using Multiple IGUs2017

    • Author(s)
      SASAO Tsutomu
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E100.D Issue: 8 Pages: 1574-1582

    • DOI

      10.1587/transinf.2016LOP0001

    • NAID

      130005876098

    • ISSN
      0916-8532, 1745-1361
    • Related Report
      2017 Annual Research Report
    • Peer Reviewed
  • [Journal Article] A Balanced Decision Tree Based Heuristic for Linear Decomposition of Index Generation Functions2017

    • Author(s)
      Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E100.D Issue: 8 Pages: 1583-1591

    • DOI

      10.1587/transinf.2016LOP0013

    • NAID

      130005876136

    • ISSN
      0916-8532, 1745-1361
    • Related Report
      2017 Annual Research Report
    • Peer Reviewed / Int'l Joint Research
  • [Journal Article] A Method to Detect Bit Flips in a Soft-Error Resilient TCAM2017

    • Author(s)
      Syafalni Infall、Sasao Tsutomu、Wen Xiaoqing
    • Journal Title

      IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

      Volume: 37-8 Issue: 6 Pages: 1-1

    • DOI

      10.1109/tcad.2017.2748019

    • Related Report
      2017 Annual Research Report
    • Peer Reviewed / Int'l Joint Research
  • [Journal Article] A linear decomposition of index generation functions: Optimization using autocorelation functions2017

    • Author(s)
      T. Sasao
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 28 Pages: 105-127

    • Related Report
      2016 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] A set partition number system2016

    • Author(s)
      J. T. Butler and T. Sasao
    • Journal Title

      Australasian Journal of Combinatorics

      Volume: 65 Pages: 152-168

    • Related Report
      2016 Research-status Report
    • Peer Reviewed / Int'l Joint Research / Acknowledgement Compliant
  • [Journal Article] LUT cascades based on edge-valued multi-valued decision diagrams: Application to packet classification2016

    • Author(s)
      H. Nakahara, T. Sasao, H. Iwamoto, and M. Matsuura
    • Journal Title

      IEEE Journal on Emerging and Selected Topics in Circuits and Systems

      Volume: 6 Issue: 1 Pages: 73-86

    • DOI

      10.1109/jetcas.2016.2528638

    • Related Report
      2015 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] An Update Method for a Low Power CAM Emulator using an LUT Cascade Based on an EVMDD (k)2016

    • Author(s)
      H. Nakahara, T. Sasao, M. Matsuura, and H. Iwamoto
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 26 Pages: 109-123

    • Related Report
      2015 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] High-speed hardware partition generation2015

    • Author(s)
      J. T. Butler and T. Sasao
    • Journal Title

      ACM Transactions on Reconfigurable Technology and Systems

      Volume: 7

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] A Memory-based IPv6 lookup architecture using parallel index generation units2015

    • Author(s)
      H. Nakahara,T. Sasao, M. Matsuura, H. Iwamoto, and Y. Terao,
    • Journal Title

      IEICE Trans. Inf. and Syst

      Volume: E98-D

    • NAID

      130004841817

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] EVMDD-Based analysis and diagnosis methods of multi-state systems with multi-state components2014

    • Author(s)
      S. Nagayama, T. Sasao and J. T. Butler,
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 22

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] Index generation functions: Tutorial2014

    • Author(s)
      T. Sasao
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 23

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] Piecewise arithmetic expressions of numeric functions and their application to design of numeric function generators2014

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 23

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] A heterogeneous multi-valued decision diagram machine for encoded characteristic function for non-zero outputs2014

    • Author(s)
      H. Nakahara, T. Sasao, M. Matsuura
    • Journal Title

      Journal of Multiple-Valued Logic and Soft Computing

      Volume: 23

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] A packet classifier based on prefeching EVMDD(k) machines2014

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura,
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E97-D

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] On optimizations of edge-valued MDDs for fast analysis of multi-state systems2014

    • Author(s)
      S. Nagayama, T. Sasao, J. T. Butler, M. A. Thornton, and T. W. Manikas
    • Journal Title

      IEICE Transactions on Information and Systems

      Volume: E97-D

    • NAID

      130004685463

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] Head-tail expressions for interval functions2014

    • Author(s)
      I. Syafalni and T. Sasao,
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communication and Computer Sciences,

      Volume: E97-A

    • NAID

      130004696723

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Journal Article] A Method to find linear decompositions for incompletely specified index generation functions using difference matrix2014

    • Author(s)
      T. Sasao, Y. Urano, and Y. Iguchi
    • Journal Title

      IEICE Transactions on Fundamentals of Electronics, Communication and Computer Sciences

      Volume: E97-A

    • NAID

      130004706405

    • Related Report
      2014 Research-status Report
    • Peer Reviewed / Acknowledgement Compliant
  • [Presentation] Analysis of cyclic row-shift decompositions for index generation functions2018

    • Author(s)
      J. T. Butler and T. Sasao,
    • Organizer
      The 21st Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Related Report
      2017 Annual Research Report
  • [Presentation] A Method to identify affine equivalence classes of logic functions2018

    • Author(s)
      T. Sasao, K. Matsuura and Y. Iguchi
    • Organizer
      The 21st Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Related Report
      2017 Annual Research Report
  • [Presentation] Netlist conversion from costumer logic interface format (CLIF) to Verilog for legacy circuits,2018

    • Author(s)
      I. Syafalni, K. Wakasugi, Y. Tongxin, T. Sasao and X. Wen,
    • Organizer
      The 21st Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Related Report
      2017 Annual Research Report
  • [Presentation] An algorithm to find optimum support-reducing decompositions for index generation functions2017

    • Author(s)
      T. Sasao, K. Matsuura, Y. Iguchi
    • Organizer
      Design Automation and Test in Europe
    • Place of Presentation
      Lausanne, Switzerland
    • Year and Date
      2017-03-27
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] Index generation functions: Minimization methods2017

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research / Invited
  • [Presentation] A random forest using a multi-valued decision diagram2017

    • Author(s)
      H. Nakahara, A. Jinguji, S. Sato and T. Sasao
    • Organizer
      International Symposium on Multiple-Valued Logic
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] An exact optimization algorithm for linear decomposition of index generation function2017

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler,
    • Organizer
      International Symposium on Multiple-Valued Logic
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] On affine equivalence of logic functions2017

    • Author(s)
      T. Sasao and M. Maeta,
    • Organizer
      International Workshop on Logic and Synthesis
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Probe location checker for IC physical verification2017

    • Author(s)
      I. Syafalni, K. Wakasugi, and T. Sasao
    • Organizer
      2017 IEEE TENCON
    • Related Report
      2017 Annual Research Report
    • Int'l Joint Research
  • [Presentation] Multiple-bit-flip detection scheme for a soft-error resilient TCAM2016

    • Author(s)
      I. Syafalni, T. Sasao and X. Wen
    • Organizer
      IEEE Computer Society Annual Symposium on VLSI
    • Place of Presentation
      Pittsburgh, Pennsylvania,USA
    • Year and Date
      2016-07-11
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] Decomposition of index generation functions using a Monte Carlo method2016

    • Author(s)
      T. Sasao and J. T. Butler
    • Organizer
      International Workshop on Logic and Synthesis
    • Place of Presentation
      Austin, Texas, USA
    • Year and Date
      2016-06-10
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] A realization of index generation functions using multiple IGUs2016

    • Author(s)
      T. Sasao
    • Organizer
      International Symposium on Multiple-valued Logic
    • Place of Presentation
      Sapporo, Japan
    • Year and Date
      2016-05-18
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] An FFT circuit using nested RNS in a digital spectrometer for a radio telescope2016

    • Author(s)
      H. Nakahara, T. Sasao, H. Nakanishi, K. Iwai, T. Nagao and N. Ogawa,
    • Organizer
      International Symposium on Multiple-valued Logic
    • Place of Presentation
      Sapporo, Japan
    • Year and Date
      2016-05-18
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] An efficient heuristic algorithm for linear decomposition of index generation functions2016

    • Author(s)
      S. Nagayama, T. Sasao, and J. T. Butler
    • Organizer
      International Symposium on Multiple-valued Logic
    • Place of Presentation
      Sappro, Japan
    • Year and Date
      2016-05-18
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] On the inadmissible class of multiple-valued faulty functions under stuck-at fault2016

    • Author(s)
      D. Chowdhury, D. Das, B. Bhattacharya and T. Sasao
    • Organizer
      International Symposium on Multiple-valued Logic
    • Place of Presentation
      Sapporo, Japan
    • Year and Date
      2016-05-18
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] A heuristic decomposition of index generation functions with many variables2016

    • Author(s)
      T. Sasao, K. Matsuura, Y. Iguchi
    • Organizer
      The 20th Workshop on Synthesis And System Integration of Mixed Information Technologies
    • Place of Presentation
      Kyoto, Japan
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] Analysis of the number of variables to represent index generation functions2016

    • Author(s)
      J. T. Butler and T. Sasao
    • Organizer
      International Workshop on Boolean Problems
    • Place of Presentation
      Freiberg, Germany
    • Related Report
      2016 Research-status Report
    • Int'l Joint Research
  • [Presentation] Index generation functions: Logic synthesis for pattern matching,"2015

    • Author(s)
      T. Sasao
    • Organizer
      EPFL Workshop on Logic Synthesis and Verification
    • Place of Presentation
      Lausanne, Switzerland
    • Year and Date
      2015-12-10
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research / Invited
  • [Presentation] A deep convolutional neural network using nested residue number system2015

    • Author(s)
      H. Nakahara and T. Sasao,
    • Organizer
      The International Conference on Field-programmable Logic and Applications (FPL-2015),
    • Place of Presentation
      London, United Kingdom,
    • Year and Date
      2015-09-03
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] A method to minimize variables for incompletely specified index generation functions using a SAT solver,2015

    • Author(s)
      T. Sasao, I. Fumishi, and Y. Iguchi,
    • Organizer
      International Workshop on Logic and Synthesis,
    • Place of Presentation
      Mountain View, CA, USA
    • Year and Date
      2015-06-12
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] A soft-error tolerant TCAM for multiple-bit flips using partial don’t-care keys2015

    • Author(s)
      I. Syafalni, T. Sasao, and X. Wen,
    • Organizer
      International Workshop on Logic and Synthesis,
    • Place of Presentation
      Mountain View, CA, USA
    • Year and Date
      2015-06-12
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] A reduction method for the number of variables to represent index generation functions: s-Min method2015

    • Author(s)
      T. Sasao,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2015),
    • Place of Presentation
      Waterloo, Canada
    • Year and Date
      2015-05-18
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] An RNS FFT circuit using LUT cascades based on a modulo EVMDD2015

    • Author(s)
      H. Nakahara,T. Sasao, H. Nakanishi, and K. Iwai,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2015)
    • Place of Presentation
      Waterloo, Canada
    • Year and Date
      2015-05-18
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] Edge reduction for EVMDDs to speed up analysis of multi-state systems2015

    • Author(s)
      S. Nagayama, T. Sasao, J. T. Butler, M. Thornton, and T. Malikas,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2015),
    • Place of Presentation
      Waterloo, Canada
    • Year and Date
      2015-05-18
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] 高速パターンマッチング用ハードウエアについて2015

    • Author(s)
      笹尾勤
    • Organizer
      電子情報通信学会、DC, CPSY研究会
    • Place of Presentation
      明治大学中野キャンパス
    • Year and Date
      2015-04-17
    • Related Report
      2015 Research-status Report
    • Invited
  • [Presentation] A dynamically reconfigurable mixed analog-digital filter bank:Applied to an acoustic diagnostic system2015

    • Author(s)
      H. Nakahara, H. Yoshida, S-I. Shioya, R. Mikami, and T. Sasao,
    • Organizer
      the 11th International Symposium on Applied Reconfigurable Computing (ARC-2015),
    • Place of Presentation
      Bochum, Germany
    • Year and Date
      2015-04-13
    • Related Report
      2015 Research-status Report
    • Int'l Joint Research
  • [Presentation] Soft-error tolerant TCAMs for high-reliability packet classifications2014

    • Author(s)
      Infall Syafalni, Tsutomu Sasao, Xiaoqing Wen, Stefan Holst, Kohei Miyase
    • Organizer
      APCCAS 2014
    • Place of Presentation
      Ishigaki, Japan
    • Year and Date
      2014-11-17 – 2014-11-20
    • Related Report
      2014 Research-status Report
  • [Presentation] Analysis methods of multi-state systems partially having dependent components using multiple-valued decision diagrams2014

    • Author(s)
      S. Nagayama, T. Sasao, J. T. Butler, M. A. Thornton, and T. W. Manikas,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2014),
    • Place of Presentation
      Bremen, Germany
    • Year and Date
      2014-05-21
    • Related Report
      2014 Research-status Report
  • [Presentation] Inadmissible class of Boolean functions under stuck-at faults2014

    • Author(s)
      D. K. Das, D. Chowdhury, B. B. Bhattacharya and T. Sasao,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2014),
    • Place of Presentation
      Bremen, Germany
    • Year and Date
      2014-05-21
    • Related Report
      2014 Research-status Report
  • [Presentation] On the average number of variables to represent incompletely specified index generation functions2014

    • Author(s)
      T. Sasao
    • Organizer
      International Workshop on Logic and Synthesis
    • Place of Presentation
      San Francisco, USA
    • Year and Date
      2014-05-20 – 2014-06-01
    • Related Report
      2014 Research-status Report
  • [Presentation] A lower bound on the number of variables to represent incompletely specified index generation functions2014

    • Author(s)
      T. Sasao, Y. Urano and Y. Iguchi,
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2014)
    • Place of Presentation
      Bremen, Germany
    • Year and Date
      2014-05-19
    • Related Report
      2014 Research-status Report
  • [Presentation] An update method for a CAM emulator using an LUT cascade based on an EVMDD(k)2014

    • Author(s)
      H. Nakahara, T. Sasao and M. Matsuura
    • Organizer
      International Symposium on Multiple-Valued Logic (ISMVL-2014)
    • Place of Presentation
      Bremen, Germany
    • Year and Date
      2014-05-19
    • Related Report
      2014 Research-status Report
  • [Book] Further Improvements in the Boolean Domain2018

    • Author(s)
      Jon T. Butler and T. Sasao
    • Total Pages
      536
    • Publisher
      Cambridge Scholars Publisher
    • Related Report
      2017 Annual Research Report
  • [Book] Advance of Logic Synthesis2017

    • Author(s)
      T. Sasao and J. T. Butler
    • Total Pages
      232
    • Publisher
      Springer
    • ISBN
      9783319672946
    • Related Report
      2017 Annual Research Report
  • [Book] Applications of Zero-Suppressed Decision Diagrams2014

    • Author(s)
      T. Sasao and J. T. Butler
    • Publisher
      Morgan-Claypool
    • Related Report
      2014 Research-status Report
  • [Remarks] Welcome to LSI-CAD

    • URL

      http://www.lsi-cad.com

    • Related Report
      2017 Annual Research Report
  • [Remarks] LSI-CAD.COM

    • URL

      http://www.lsi-cad.com

    • Related Report
      2016 Research-status Report 2015 Research-status Report
  • [Remarks] 笹尾勤

    • URL

      http://www.lsi-cad.com/index.html

    • Related Report
      2014 Research-status Report
  • [Patent(Industrial Property Rights)] Content addressable memory, an index generator, and a registered information update method2018

    • Inventor(s)
      Tsutomu Sasao
    • Industrial Property Rights Holder
      Meiji University
    • Industrial Property Rights Type
      特許
    • Filing Date
      2018
    • Acquisition Date
      2018
    • Related Report
      2017 Annual Research Report
    • Overseas
  • [Patent(Industrial Property Rights)] 連想記憶装置、インデックス生成器、及び登録情報更新方法2015

    • Inventor(s)
      笹尾勤
    • Industrial Property Rights Holder
      学校法人明治大学
    • Industrial Property Rights Type
      特許
    • Filing Date
      2015-09-19
    • Related Report
      2015 Research-status Report
    • Overseas
  • [Patent(Industrial Property Rights)] 連想記憶装置、インデックス生成器、及び登録情報更新方法2014

    • Inventor(s)
      笹尾勤
    • Industrial Property Rights Holder
      笹尾勤
    • Industrial Property Rights Type
      特許
    • Industrial Property Number
      2014-168777
    • Filing Date
      2014-08-21
    • Related Report
      2014 Research-status Report

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Published: 2014-04-04   Modified: 2022-01-24  

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