Research on Hardware Implementation Methodology of PLC Programs for Concealment and Obfuscation
| Project/Area Number |
26870278
|
|---|
| Research Category |
Grant-in-Aid for Young Scientists (B)
|
| Allocation Type | Multi-year Fund |
|---|
| Research Field |
Information security
Computer system
|
|---|
| Research Institution | Toyohashi University of Technology |
|---|
Principal Investigator |
FUJIEDA Naoki 豊橋技術科学大学, 工学(系)研究科(研究院), 助教 (30708425)
|
|---|
| Project Period (FY) |
2014-04-01 – 2017-03-31
|
| Project Status |
Completed (Fiscal Year 2016)
|
| Budget Amount *help |
¥2,340,000 (Direct Cost: ¥1,800,000、Indirect Cost: ¥540,000)
Fiscal Year 2016: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2015: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
Fiscal Year 2014: ¥780,000 (Direct Cost: ¥600,000、Indirect Cost: ¥180,000)
|
|---|
| Keywords | FPGA / ハードウェア / セキュリティ / 専用回路 / 難読化 / セキュアプロセッサ |
|---|
| Outline of Final Research Achievements |
This theme examined methods to conceal and obfuscate programs for PLCs, computers designed for sequence control, by translating them into hard-wired circuits using FPGAs. Translation after applying an obfuscation method was studied and software infrastructure to obtain obfuscated circuits was developed. This theme also studied techniques for obfuscating and encrypting software on general purpose processors, in expectation of the case that only a part of a program was implemented by hardware and the rest was executed on a processor as software.
|
Report
(4 results)
Research Products
(15 results)
