Efficient FPGA Circuit Modification for Specification Change and Design Debug

2017 Fiscal Year Final Research Report

• Project/Area Number: 15K15963
• Research Category: Grant-in-Aid for Young Scientists (B)
• Allocation Type: Multi-year Fund
• Research Field: Computer system
• Research Institution: Ishikawa National College of Technology
• Principal Investigator: Matsumoto Takeshi 石川工業高等専門学校, その他部局等, 准教授 (40536140)
• Project Period (FY): 2015-04-01 – 2018-03-31
• Keywords: FPGA設計 / 論理修正 / デバッグ支援

Outline of Final Research Achievements

Field Programmable Gate Array (FPGA) is a sort of integrated circuit whose logic is programmable on-site after manufactured. To make FPGA design more efficient in cases where the design needs to be changed or rectified due to specification changes or design errors, in this work, we show that the change or rectification can be achieved by modifying some logic elements with the placement and routing of the design kept.

Free Research Field

VLSI設計支援