Development of formal design methodology for VLSI datapaths based on Galois-field arithmetic operations(Fostering Joint International Research)

2017 Fiscal Year Final Research Report

• Project/Area Number: 15KK0001
• Research Category: Fund for the Promotion of Joint International Research (Fostering Joint International Research)
• Allocation Type: Multi-year Fund
• Research Field: Computer system
• Research Institution: Tohoku University
• Principal Investigator: Homma Naofumi 東北大学, 電気通信研究所, 教授 (00343062)
• Research Collaborator: Danger Jean-Luc COMELEC, Professor
• Project Period (FY): 2016 – 2017
• Keywords: 計算機システム

Outline of Final Research Achievements

This research has developed a formal description and verification method of tamper resistant cryptographic processors with attack countermeasures described as arithmetic operations on the Galois field in order to establish a formal design methodology of tamper resistant cryptographic processors. In addition, we have designed and developed highly efficient tamper resistant cryptographic processors as its application. In particular, since the threat of side-channel attack which directly accesses cryptographic processors to retrieve secret information is rapidly increasing, we focused on countermeasures against side-channel attacks and formally designed cryptographic processors resistant to that kind of attacks, and also performed the prototyping and evaluation of designed cryptographic processors.

Free Research Field

計算機科学