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2018 Fiscal Year Final Research Report

Design Framework for Functional Safety on FPGA Computing

Research Project

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Project/Area Number 16K00076
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeMulti-year Fund
Section一般
Research Field Computer system
Research InstitutionNagasaki University

Principal Investigator

SHIBATA Yuichiro  長崎大学, 工学研究科, 教授 (10336183)

Project Period (FY) 2016-04-01 – 2019-03-31
KeywordsFPGA / 機能安全 / 冗長設計
Outline of Final Research Achievements

Field programmable gate arrays (FPGAs), which are programmable hardware, are advantageous in terms of performance per power compared to software processing on traditional computer, and thus promising also in application fields requiring a high degree of functional safety such as control systems for power plants and self driving vehicles. In this work, aiming at increase in functional safety of FPGAs, redundant design approaches with diversity are proposed and the effectivenesses are revealed through simulations and real hardware experiments.

Free Research Field

コンピュータ工学

Academic Significance and Societal Importance of the Research Achievements

FPGAは電力効率の良い計算加速器としてすでにデータセンターなどで導入が進んでいるが,機能安全を考慮した設計手法に関する知見が乏しく,産業用インフラシステムや自動運転制御など高い信頼性が要求される分野での応用はあまり進んでいなかった.本研究で提案した手法では,設計者の負担を抑えつつ,従来の単純な同種冗長設計に比べてエラー検出率が向上することが可能であり,機能安全性の担保と設計生産性の向上を両立させる手法の基盤を与えたといえる.

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Published: 2020-03-30  

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