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2018 Fiscal Year Final Research Report

Research on automatic layout methods considering wire delay for superconductive digital circuits

Research Project

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Project/Area Number 16K16029
Research Category

Grant-in-Aid for Young Scientists (B)

Allocation TypeMulti-year Fund
Research Field Computer system
Research InstitutionChukyo University

Principal Investigator

Kito Nobutaka  中京大学, 工学部, 講師 (90630997)

Project Period (FY) 2016-04-01 – 2019-03-31
Keywords超伝導単一磁束量子回路 / 配線遅延 / レイアウト設計 / 設計自動化 / 自動配線 / 自動配置
Outline of Final Research Achievements

We have developed automatic routing methods and a placement method for energy-efficient and high-speed rapid single flux quantum (RSFQ) logic circuits. We have also designed prototypes of design tools based on those methods.
In this research program, we have developed automatic routing methods for RSFQ circuits at first. The routing phase in the current RSFQ layout design flow has been performed mainly by hand. In the routing phase, every paths toward each gate need to be designed to have the same amount of wire delay to obtain chips working reliably. Therefore, we have developed routing methods which treat amount of wire delay on each path as one of input parameters. We have also developed an automatic placement method cooperated with the routing methods. We also developed design automation technologies related to placement and routing.

Free Research Field

計算機システム

Academic Significance and Societal Importance of the Research Achievements

従来、超伝導SFQ回路のレイアウト設計においては論理ゲートを人手により配置し、手作業によりその間の配線を行っていた。本研究課題の開始時点ではその作業の自動化については手法の研究・ツールの開発どちらも手つかずであり設計に困難が伴った。
本研究によりSFQ回路の性質に注目して手法の提案を行うことで初期的な設計自動化が可能となったほか、今後さらに実用的な手法とするための研究課題の整理が進んだ。本研究等に触発され半導体分野の設計自動化の研究者も参入しており、超伝導ディジタル回路の設計自動化に関して研究分野としての確立に貢献した。

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Published: 2020-03-30  

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