2017 Fiscal Year Final Research Report
Research and development of ultralow power circuit built by steep subthreshold slope FET and embedded FeRAM based on ferroelectric HfO2 thin film
Project/Area Number |
16K18085
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Research Category |
Grant-in-Aid for Young Scientists (B)
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Allocation Type | Multi-year Fund |
Research Field |
Electron device/Electronic equipment
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Research Institution | The University of Tokyo |
Principal Investigator |
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Co-Investigator(Renkei-kenkyūsha) |
HIRAMOTO Toshiro 東京大学, 生産技術研究所, 教授 (20192718)
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Project Period (FY) |
2016-04-01 – 2018-03-31
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Keywords | 低消費電力 / 負性容量トランジスタ / 不揮発性メモリ / 強誘電体 / 酸化ハフニウム |
Outline of Final Research Achievements |
We have studied and developed transistor and memory technology for ultralow power integrated circuit system in IoT sensor node module. For transistor, we have clarified device design guideline of negative capacitance FET (NCFET) which can operate at below supply voltage 0.2V. We have fabricated and demonstrated NCFET with steep subthreshold slope, and proposed new physical mechanism on device operation principle. For memory, we have successfully designed, fabricated and demonstrated non-volatile SRAM cell which can significantly suppress standby leakage. Both for transistor and memory, we have introduced ferroelectric HfO2 thin film which enables very low cost process integration for manufacturing. The above-mentioned results are important achievements demonstrating possibility and usefulness and will open new paths for very low-cost ultralow power device technology
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Free Research Field |
集積ナノエレクトロニクス
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