Submicron-scale selective metallization process for 3D integration technology

2019 Fiscal Year Final Research Report

• Project/Area Number: 17H02769
• Research Category: Grant-in-Aid for Scientific Research (B)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Applied materials
• Research Institution: National Institute for Materials Science
• Principal Investigator: MINARI Takeo 国立研究開発法人物質・材料研究機構, 機能性材料研究拠点, 独立研究者 (90443035)
• Project Period (FY): 2017-04-01 – 2020-03-31
• Keywords: プリンテッドエレクトロニクス / 無電解めっき / 三次元実装 / 有機トランジスタ

Outline of Final Research Achievements

In this project, we developed "ultrahigh-resolution Printed Electronics" and "selective electroless plating" techniques for realizing a novel 3-dimentional integration technology. Printed Electronics technique using metal nanoparticle ink realized printable interconnections with the line width of 0.8 micrometer. The electroless plating techniques enabled the direct formation of metal interconnections with the line width of 1 micrometer. We also realized the 3-dimensional layer-by-layer stacking process with the connection between each layers through via holes.

Free Research Field

有機半導体デバイス

Academic Significance and Societal Importance of the Research Achievements

金属のインクを塗って電子回路を描く「プリンテッドエレクトロニクス」技術と、任意の領域のみを自発的にめっきで金属化する「選択的無電解めっき」技術を開発し、これまでより微細な配線を形成した。さらに配線を三次元的に積層する技術を開発し、複雑な電子回路ができるようになった。