2019 Fiscal Year Final Research Report
Neural network LSI for deep learning
| Project/Area Number |
17K00083
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Multi-year Fund |
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| Section | 一般 |
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| Research Field |
Computer system
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| Research Institution | Kumamoto University |
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Principal Investigator |
Amagasaki Motoki 熊本大学, 大学院先端科学研究部(工), 准教授 (50467974)
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| Project Period (FY) |
2017-04-01 – 2020-03-31
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| Keywords | AIチップ / ニューラルネットワーク |
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| Outline of Final Research Achievements |
In this research, in order to deal with a wide variety of applications and structures of DNNs, we have researched and developed an AI architecture with low cost, high usability, high speed, and ultra-low cost with reconfigurability. The circuit structure of a power-consuming reconfigurable AI accelerator is revealed. We also evaluated the performance at the layout design level using the standard cell library. Maximum operating frequency when implementing the pythorch-AlexNet model for CIFAR100 The frequency was 350 MHz. The processing power per second of the inference model is 100 [FPS], the power consumption is 0.11 [W], and estimated energy efficiency was 883 [FPS/W]. Based on the architecture developed in this research, we plan to work on models for edge computing.
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| Free Research Field |
リコンフィギャラブルシステム
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| Academic Significance and Societal Importance of the Research Achievements |
提案する深層学習チップの特徴は，NNの複雑さや規模に応じてHW構成を最適化できる点にある．特に，演算精度に着目してHW量を削減する回路最適化できる点が重要なポイントである．現在の深層学習は人工知能の先駆けに過ぎず，人間の知能に近づけるには膨大な計算量をいかに高速，低電力でできるかがカギとなる．一方，GPGPUや商用FPGAなどの汎用デバイスを用いたアプローチではこれらに対し限界が来るのは明らかである．提案する深層学習チップ開発を通して，IoTにおけるエッジサイドでの利用に対し、用途に合わせた最適化な形で処理を実行できる枠組みを示した．
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