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2008 Fiscal Year Final Research Report

Design and Integration of Power Line Circuit for SiC Power Devices Considering EMC

Research Project

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Project/Area Number 18360137
Research Category

Grant-in-Aid for Scientific Research (B)

Allocation TypeSingle-year Grants
Section一般
Research Field 電力工学・電気機器工学
Research InstitutionKyoto University

Principal Investigator

HIKIHARA Takashi  Kyoto University, 大学院・工学研究科, 教授 (70198985)

Co-Investigator(Kenkyū-buntansha) WADA Osami  京都大学, 大学院・工学研究科, 教授 (10210973)
KIMOTO Tsunenobu  京都大学, 大学院・工学研究科, 教授 (80225078)
FUNAKI Tsuyoshi  大阪大学, 大学院・工学研究科, 教授 (20263220)
SUSUKI Susuki Yoshihiko  京都大学, 大学院・工学研究科, 助教 (40402961)
Project Period (FY) 2006 – 2008
KeywordsSiC / パワーデバイス / EMC / 回路実装 / 集積化
Research Abstract

本研究は, SiC パワーデバイスの優位な特性の一つである高速スイッチング特性を生かす回路設計を検討すると同時に, そのパワー配線および大電流のスイッチングによって発生する電磁放射の問題等に, 実験的に検討を加えたものである. その結果, SiC デバイスの開発に合わせて物性物理に立脚したデバイスモデルを構築し, 高速スイッチングを実現するための駆動回路の開発を行い, SiC パワーデバイスの集積化に向けてパワー配線の設計およびそのEMC 特性と抑制に関する知見を得た.

  • Research Products

    (27 results)

All 2009 2008 2007 2006

All Journal Article (10 results) (of which Peer Reviewed: 9 results) Presentation (15 results) Book (1 results) Patent(Industrial Property Rights) (1 results)

  • [Journal Article] Measuring terminal capacitance and its voltage dependency for high-voltagepower devices2009

    • Author(s)
      T.Funaki, N.Phankong, T.Kimoto, and T.Hikihara
    • Journal Title

      IEEE Transaction on Power Electronics (to appear)

    • Peer Reviewed
  • [Journal Article] Indirect extension of the image theory to partial inductance calculations2008

    • Author(s)
      U. Paoletti, T. Hisakado, and O. Wada
    • Journal Title

      IEICE Electronics Express vol.5, no.17

      Pages: 644-649

    • Peer Reviewed
  • [Journal Article] Improved Performance of 4H-SiC Double Reduced Surface Field Metal-Oxide-Semiconductor Field-Effect Transistors by Increasing RESURF Doses2008

    • Author(s)
      M. Noborio, J. Suda,, T. Kimoto
    • Journal Title

      Applied Physics Express No.1

      Pages: 101403

    • Peer Reviewed
  • [Journal Article] Evaluation of High Frequency Switching Capability of SiC Schottky Barrier Diode, Based on Junction Capacitance Model2008

    • Author(s)
      T.Funaki, T.Kimoto, and T.Hikihara
    • Journal Title

      IEEE Transaction on Power Electronics Vol.23, No.5

      Pages: 2602-2611

    • Peer Reviewed
  • [Journal Article] Evaluation of capacitance-voltage characteristics for high voltage SiC-JFET2007

    • Author(s)
      T.Funaki, T.Kimoto, T. Hikihara
    • Journal Title

      IEICE Electron. Express Vol.4 No.16

      Pages: 517-523

    • Peer Reviewed
  • [Journal Article] 4H-SiC lateral double RESURF MOSFETs with low on resistance2007

    • Author(s)
      M. Noborio, J. Suda, T. Kimoto
    • Journal Title

      IEEE Trans. Electron Devices Vol.54

      Pages: 1216-1223

    • Peer Reviewed
  • [Journal Article] De-embedding Technique for the Extraction of Parasitic and Stray Capacitances from 1-Port Measurements2007

    • Author(s)
      U. Paoletti, O. Wada
    • Journal Title

      IEICE Trans. Commun Vol.E90B, No. 6

      Pages: 2298-2304

    • Peer Reviewed
  • [Journal Article] マイクロコントローラの多電源ピンLECCS-core モデ の構築2006

    • Author(s)
      中村克己, 南澤裕一郎, 豊田啓孝, 和田修己, 斎藤義行, 中村篤
    • Journal Title

      電子情報通信学会論文誌C Vol.J89-C, No.11

      Pages: 833-842

    • Peer Reviewed
  • [Journal Article] Reduction of on-resistance in 4H-SiC multi-RESURF MOSFETs2006

    • Author(s)
      M. Noborio, J. Suda, and T. Kimoto
    • Journal Title

      Materials Science Forum Vol.527-529

      Pages: 1305-1308

  • [Journal Article] Characterization of punch-through phenomenon in SiC-SBD by capacitance-voltage measurement at high reverse bias voltage2006

    • Author(s)
      T.Funaki, S. Matsuzaki, T. Kimoto, and T. Hikihara
    • Journal Title

      IEICE Electron. Express Vol.3, No.6

      Pages: 379-384

    • Peer Reviewed
  • [Presentation] On the Extension of the Image Theory to Partial Inductance Calculation2008

    • Author(s)
      U. Paoletti, T. Hisakado, and O. Wada
    • Organizer
      2008 Electrical Design of Advanced Packaging, Systems Symposium (2008 EDAPS)
    • Place of Presentation
      Seoul, Korea
    • Year and Date
      2008-12-11
  • [Presentation] Modeling of Power MOSFET Based on Capacitance-Voltage Characteristics2008

    • Author(s)
      N.Phankong, T.Funaki, and T.Hikihara
    • Organizer
      平成20 年電気学会産業応用部門大会
    • Place of Presentation
      高知
    • Year and Date
      2008-08-29
  • [Presentation] SiCJFET のゲートドライブ回路とスイッチング特性2008

    • Author(s)
      宅野嗣大, 引原隆士
    • Organizer
      電気学会産業応用部門全国大会
    • Place of Presentation
      高知
    • Year and Date
      2008-08-29
  • [Presentation] Effect of Package Common-Mode Current on PCB Power Bus Noise and Radiation2008

    • Author(s)
      U. Paoletti, T. Hisakado, and O. Wada
    • Organizer
      International Conference on Electronics Packaging (ICEP 2008)
    • Place of Presentation
      Tokyo
    • Year and Date
      2008-06-11
  • [Presentation] H-SiC double RESURF MOSFETs with a record performance by increasing RESURF dose2008

    • Author(s)
      M. Noborio, J. Suda, and T. Kimoto
    • Organizer
      Proc. of 20th Int. Symp. on Power Semiconductor Devices, IC's, Orlando
    • Place of Presentation
      USA
    • Year and Date
      2008-05-19
  • [Presentation] Effect of Package Parasitics on Conducted and Radiated Emission with Mixed-Mode Analysis2008

    • Author(s)
      U. Paoletti, T. Hisakado, and O. Wada
    • Organizer
      2008 Asia-Pacific Symposium on Electromagnetic Compatibility
    • Place of Presentation
      Singapore
    • Year and Date
      2008-05-15
  • [Presentation] Importance and Limitations of Modeling Parasitic Capacitance Between Package and PCB for Power Bus Noise and Radiation2008

    • Author(s)
      U. Paoletti, T. Hisakado, and O. Wada
    • Organizer
      Pan-Pacific EMC Joint Meeting
    • Place of Presentation
      武蔵野市
    • Year and Date
      2008-05-15
  • [Presentation] 電力変換回路近傍に配置したグランドの放射電磁界強度分布への影響について2007

    • Author(s)
      引原隆士, 宅野嗣大
    • Organizer
      平成19年電気関係学会関西支部連合大会
    • Place of Presentation
      神戸(G4-11)
    • Year and Date
      2007-11-17
  • [Presentation] Enhanced Channel Mobility in 4H-SiC MISFETs by Utilizing Deposited SiN/SiO2 Stack Gate Structures2007

    • Author(s)
      M. Noborio, J. Suda, and T. Kimoto
    • Organizer
      Int. Conf. on Silicon Carbide and Related Materials2007
    • Place of Presentation
      Ohtsu, Japan
    • Year and Date
      2007-10-27
  • [Presentation] 少数キャリア蓄積を考慮したSiC パワー・ダイオードの逆回復現象のモデリングに関する検討2007

    • Author(s)
      澤田高志, 舟木剛, 引原隆士
    • Organizer
      電気学会電子デバイス/半導体電力変換回路研究会
    • Place of Presentation
      三重(ECD-07-72/SPC-07-98)
    • Year and Date
      2007-10-25
  • [Presentation] Time-domain Simulation of CMOS Output Buffer with LECCS-I/O Model and Time-variant Linear Switches2007

    • Author(s)
      T. Hisakado, A. Koyama, O. Wada
    • Organizer
      IEEE Int. Symp. On Electromagnetic Compatibility
    • Place of Presentation
      Honolulu, Hawaii, USA(WE-PM-2-SS-1)
    • Year and Date
      2007-07-11
  • [Presentation] Analytical Calculation of Point-to-Point Partial, Inductance of a Perfect Ground Plane2007

    • Author(s)
      U. Paoletti, T. Hisakado, O. Wada
    • Organizer
      IEEE Workshop on Signal Propagation on Interconnects(SPI 2007)
    • Place of Presentation
      Genova, Italy(217-220)
    • Year and Date
      2007-05-15
  • [Presentation] EMI Antenna Model Based on Common-Mode Potential Distribution for Fast Prediction of Radiated Emission2006

    • Author(s)
      Y.Sakai, T.Watanabe, and O.Wada T.Matsushima, K. Iokibe, Y.Toyota, R.Koga
    • Organizer
      IEEE International Symposium on Electromagnetic Compatibility (EMC2006)
    • Place of Presentation
      Pennsylvania, USA
    • Year and Date
      20060628-30
  • [Presentation] 逆回復特性と空乏層蓄積電荷を考慮したパワー・ダイオードモデルについての一検討2006

    • Author(s)
      舟木剛, 澤田高志, 引原隆士
    • Organizer
      信学技報CAS
    • Place of Presentation
      大阪(Vol.106, No. 272)
    • Year and Date
      2006-10-04
  • [Presentation] Energy-based analysis of frequency entrainment described by van der Pol and PLL equations2006

    • Author(s)
      Y. Susuki, Y. Yokoi, and T. Hikihara
    • Organizer
      信学技報
    • Place of Presentation
      函館(NLP2006-100)
    • Year and Date
      2006-07-04
  • [Book] ハワード・ジョンソン 高速信号ボードの設計(基礎)(須藤俊夫 和田修己, 他)2007

    • Author(s)
      Howard Johnson Martin Graham
    • Total Pages
      462
    • Publisher
      丸善
  • [Patent(Industrial Property Rights)] 半導体スイッチング装置2008

    • Inventor(s)
      澤田研一, 築野孝, 引原隆士, 宅野嗣大
    • Industrial Property Rights Holder
      住友電工株式会社, 京都大学
    • Industrial Property Number
      特許, 特願2008-213101
    • Filing Date
      2008-08-21

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Published: 2010-06-10   Modified: 2016-04-21  

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