2021 Fiscal Year Final Research Report
Inverstigation on vertical tunnel FET using Si/III-V heterojunction and their three-dimensional integrated circuit applications
| Project/Area Number |
19H02184
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| Research Category |
Grant-in-Aid for Scientific Research (B)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Review Section |
Basic Section 21060:Electron device and electronic equipment-related
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| Research Institution | Hokkaido University |
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Principal Investigator |
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| Co-Investigator(Kenkyū-buntansha) |
池辺 将之 北海道大学, 量子集積エレクトロニクス研究センター, 教授 (20374613)
本久 順一 北海道大学, 情報科学研究院, 教授 (60212263)
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| Project Period (FY) |
2019-04-01 – 2022-03-31
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| Keywords | ナノワイヤ / トランジスタ / トンネルFET / FET / III-V |
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| Outline of Final Research Achievements |
In this research, we developed and explored heterogeneous integration of III-V nanowires heterogeneous for high-speed, low-power, and high-efficiency three-dimensional (3D) circuits application. a nanowire 3D-architecture revolutionized the existing planar integration paradigm, and created a new trend in next-generation electronics. We have created an ultra-efficient tunnel transistors driven by nanowatts based on a new Si/III-V nanowire junction and tunneling transport mechanism. These results would provided new design guidelines for three-dimensional circuit structures based on nanowire TFETs.
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| Free Research Field |
薄膜成長、半導体デバイス、半導体ナノ構造
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| Academic Significance and Societal Importance of the Research Achievements |
本研究成果によって、超低消費電力で動作するスイッチ素子の作製と集積技術が確立された。爆発的な情報端末・車載エレクトロニクスの普及，人口増加でエネルギー消費量は今後，指数関数的に増加することが予想される次世代エレクトロニクスにおいて、抜本的な省エネルギー化を新しいスイッチ素子、集積方法で実現できるようになる。
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