Understanding Channel Conductance Mechanism of Hf-based Ferroelectric-gate FETs Toward the Artificial Neural Network Application

2020 Fiscal Year Final Research Report

• Project/Area Number: 19K15021
• Research Category: Grant-in-Aid for Early-Career Scientists
• Allocation Type: Multi-year Fund
• Review Section: Basic Section 21050:Electric and electronic materials-related
• Research Institution: The University of Tokyo
• Principal Investigator: Toprasertpong Kasidit 東京大学, 大学院工学系研究科(工学部), 助教 (00826472)
• Project Period (FY): 2019-04-01 – 2021-03-31
• Keywords: 強誘電体FET / FeFET / AI計算 / HZO / 界面

Outline of Final Research Achievements

This research aims to improve the hafnia-based ferroelectric transistors for AI hardware, particularly focusing on clarifying the device operation mechanism and establishing the device design guideline. We have established the method to avoid the severe tradeoff during fabrication process of ferroelectric transistors and demonstrated devices with excellent device performance and memory properties. We propose novel evaluation methods that reveal the physical phenomenon and device operation mechanism in ferroelectric transistors, which provides a device design guideline depending on the applications.

Free Research Field

電子デバイス

Academic Significance and Societal Importance of the Research Achievements

本研究で達成した強誘電体トランジスターの動作機構の解明と設計指針の確立により、強誘電体材料分野、固体物理分野、電子デバイス分野、およびAI分野をはじめとする幅広い研究分野に有意義な知見を得た。次世代メモリや次世代AIハードウェアとして世界中の企業等が検討し始めて期待されているこの材料・デバイスの基礎研究を行い、技術の基盤を作ったことで、技術の実用化と早期普及につながると期待される。