Study on tunnel field effect transistors for ultra-low power analog devices

2019 Fiscal Year Final Research Report

• Project/Area Number: 19K21084
• Project/Area Number (Other): 18H05913 (2018)
• Research Category: Grant-in-Aid for Research Activity Start-up
• Allocation Type: Multi-year Fund (2019); Single-year Grants (2018)
• Review Section: 0302:Electrical and electronic engineering and related fields
• Research Institution: Tokyo Institute of Technology (2019); National Institute of Information and Communications Technology
• Principal Investigator: GOTOW TAKAHIRO 東京工業大学, 工学院, 助教 (70827914)
• Project Period (FY): 2018-08-24 – 2020-03-31
• Keywords: TFET

Outline of Final Research Achievements

Tunnel field-effect transistors (TFETs) have been widely studied as promising candidates for steep slope devices. Among them, the Type-II heterojunction TFET that uses GaAsSb as the source and InGaAs as the channel is the most promising from a material standpoint. In addition, from the viewpoint of the device structure, it is essential to adopt a nanosheet channel structure that enables lateral miniaturization of the source/channel junction. We fabricated a nanosheet channel InGaAs MOSFET and evaluated the mobility of InGaAs channel. These technologies accelerate the study of the nanosheet channel TFETs.

Free Research Field

化合物半導体デバイス

Academic Significance and Societal Importance of the Research Achievements

本研究のトランジスタはアナログ・ロジック回路の最も重要な構成要素の1つであり、極低消費電力化と高速化を両立させようという取り組みである。また、今回の横型デバイスはこれまでのSiプラットフォームへの適用も可能であり汎用性が高い。製品応用を視野に入れると低消費電力素子が必要な分野は多く存在する。センサネットワークや発電可能な集積回路など、章補電力を極限的に下げることへの要請は数多く存在する。そのため、トンネルFETの実用化により、これまでの半導体集積回路技術では実現出来なかった新たな応用分野が広がっていくと考えられる。