2009 Fiscal Year Final Research Report
Study on 4-Dimensional FPGA Architectures Based on Dynamically Reconfigurable Technique
| Project/Area Number |
20700043
|
|---|
| Research Category |
Grant-in-Aid for Young Scientists (B)
|
| Allocation Type | Single-year Grants |
|---|
| Research Field |
Computer system/Network
|
|---|
| Research Institution | Tohoku University |
|---|
Principal Investigator |
MIYAMOTO Naoto Tohoku University, 未来科学技術共同研究センター, 助教 (60400462)
|
|---|
| Project Period (FY) |
2008 – 2009
|
| Keywords | リコンフィギャラブルシステム / 動的再構成 / FPGA / 三次元積層 |
|---|
| Research Abstract |
The optimal architecture of 4-dimensional FPGA, a 3-dimensional stacking of dynamically reconfigurable FPGAs, is cube structure. However, it is found that FPGA with 1000 or less tiles still has higher logic density without 3-dimensional stacking. Temporal communication module and temporal partitioning algorithm make 4-dimensional FPGA possible to emulate with the same speed performance as FPGA. Future issues will be high speed placement-and-route algorithm and thermal problem.
|
