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2009 Fiscal Year Annual Research Report

形態機能性マイクロ接合によるナノデバイス/CMOS融合型三次元集積回路の創生

Research Project

Project/Area Number 21246061
Research InstitutionKyushu University

Principal Investigator

浅野 種正  Kyushu University, 大学院・シマテム情報科学研究院, 教授 (50126306)

Co-Investigator(Kenkyū-buntansha) 田中 康一郎  九州産業大学, 情報工学部, 准教授 (40253570)
Keywords三次元集積回路 / インターコネクト / 3D-LSI / マイクロ接合 / 常温接合 / バンプ / 先鋭バンプ / ヘテロ集積
Research Abstract

・ 精密接合装置を導入して研究に利用できる状態に整備した。研究代表者らの発明によるコーン形のコンプライアント・バンプのアレイを形成したシリコン試験チップの接合を行い、接合精度の調査を行った。その結果、導入した接合装置を用いてチップ当たり30,000接点以上の接合点をもつシリコンチップを接合できることを確認した。一方、接合精度については、コーン形バンプを形成したシリコンチップでは通常の立方体形バンプの場合に比べてわずかに劣るが、それでも約1ミクロンという従来に比べて高い位置整定精度をもつことがわかった。
・ 有限要素解析を実施した結果、コーン形バンプの形状によっては接合の際の荷重によって座屈変形を起こすために、ほとんど変形しない通常の立方体形バンプ電極に比べて精度が悪化する傾向にあることがわかった。
・ 有限要素解析の結果から、コーン形コンプライアント・バンプを用いると、例えば有機樹脂上に形成した配線にも接合できる可能性が示され、ナノ材料との融合に向けて有益な知見を得た。
・コンプライアント・バンプを最小は6ミクロン、最大は35ミクロンの範囲で自由に設計、作製を可能にするフォトレジスト材料とその使用方法を開発した。これにより、LSIの3次元集積に向けた応用展開が可能になると期待できる。
・ 水素ラジカルによる電極表面の清浄化処理装置を自作し、その効果を調査した結果、あまり有効でないことがわかった。その理由は、水素ラジカルによって表面の清浄化は行えるが、それを大気暴露した瞬間に表面が炭素で汚染されるためであることがわかった。
・ ナノデバイス/CMOS融合型三次元回路を構成する際に物理的に重要となると予想されるLSI素子への歪みによる性能劣化について試験素子を作製し、詳細に調査した。その結果、接合にともなって発生する歪みは素子特性を大きく変動させることはないことがわかった。

  • Research Products

    (25 results)

All 2010 2009 Other

All Journal Article (13 results) (of which Peer Reviewed: 13 results) Presentation (10 results) Remarks (1 results) Patent(Industrial Property Rights) (1 results)

  • [Journal Article] 3D-integration of a log spiral antenna onto a dual grating-gate plasmon -resonant terahertz emitter for high-directivity radiation2009

    • Author(s)
      H.C.Kang, T.Nishimura, T.Komori, T.Mori, N.Watanabe, T.Asano, T.Otsuj
    • Journal Title

      Journal of Physics : Conference Series 193

      Pages: 012070-1-012070-4

    • Peer Reviewed
  • [Journal Article] Integration of Compliant Bump with Through-Si-Via Technology andn It s Application to Backside Illuminated CMOS Image Sensor2009

    • Author(s)
      T.Asano, N.Watanabe, I.Tsunoda, T.Takao, K.Tanaka, T.Hiagashimachi, Y.Yamaji, M Aoyagi, T.Kyotani, H.Arao, Y .Kimiya, K.Fukunaga, A.Ikeda, Y.Kuroki, T.Tsurushima
    • Journal Title

      Proc. 2009 Int. Conf. Electronics Packaging

      Pages: 185-190

    • Peer Reviewed
  • [Journal Article] Investigation on Wet-Chemical Surface Cleaning of Au Bump for Low-Temperature Chip-Stack Bonding Using Compliant Bump2009

    • Author(s)
      T.Mori, N.Watanabe, T.Asano
    • Journal Title

      Proc. 2009 Int. Conf. Electronics Packaging

      Pages: 392-396

    • Peer Reviewed
  • [Journal Article] Application of Compliant Bump to Stacking Ultra-thin Chips with High Number of Inter-chip Connections for Back-side Illuminated CMOS Image Sensor2009

    • Author(s)
      N.Watanabe, I.Tsunoda, T.Asano
    • Journal Title

      Ext. Abs. 2009 IMFEDK International Meeting for Future of Electron Devices, Kansai

      Pages: 56-57

    • Peer Reviewed
  • [Journal Article] Study on impact ionization in uniaxially strained MOSFET2009

    • Author(s)
      S.Adachi, T.Asano
    • Journal Title

      Ext. Abs. 2009 IMFEDK International Meeting for Future of Electron Devices, Kansai

      Pages: 54-55

    • Peer Reviewed
  • [Journal Article] Compliant Bump Technology for Back-Side Illuminated CMOS Image Sensor2009

    • Author(s)
      T.Asano, N.Watanabe, I.Tsunoda, Y.Kimiya, K.Fukunaga, M.Handa, H.Arao, Y.Yamaji, M.Aoyagi, T.Higashimachi, K.Tanaka, T.Takao, K.Matsumura, A.Ikeda, Y.Kuroki, T.Tsurushima
    • Journal Title

      Proc. 2009 Int. Electronic Components and Techn ology Conference"

      Pages: 40-45

    • Peer Reviewed
  • [Journal Article] Simulation and experiment of liquid-phase microjoining using cone-shaped compliant bump2009

    • Author(s)
      L.J.Qiu, N.Watanabe, T.Asano
    • Journal Title

      Proc. 2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices

      Pages: 1B-9

    • Peer Reviewed
  • [Journal Article] Liquid Phase Bonding Using Au Compliant Bumps for Fine-Pitch Solder Bump Interconnection2009

    • Author(s)
      L.J.Qiu, N.Watanabe, T.Asano
    • Journal Title

      Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials

      Pages: 366-367

    • Peer Reviewed
  • [Journal Article] High-Density Room-Temperature 3D Chip-Stacking Using Mechanical Caulking With Compliant Bump andThrough-Hole-Electrode2009

    • Author(s)
      N.Watanabe, M.Kawashita, Y.Yoshimura, N.Tanaka, T.A sano
    • Journal Title

      Proceedings of ASME 2009 InterPACK Conference

      Pages: IPACK2009-89274

    • Peer Reviewed
  • [Journal Article] 3D-integration of a log spiral antenna onto a dual grating-gate plasmon-resonant terahertz emitter for high-directivity radiation2009

    • Author(s)
      H.C.Kang, T.Nishimura, T.Otsuji, T.Mori, N.Watanabe, T.Asano
    • Journal Title

      EDISON : 16th Int. Conf. on Electron Dynamics i n Semiconductors, Optoelectronics and Nanostructures

      Pages: 239

    • Peer Reviewed
  • [Journal Article] Back-Side Illuminated CMOS Image Sensor Fabricated using Compliant Bump"2009

    • Author(s)
      N.Watanabe, I.Tsunoda, T.Takao, K.Tanaka, T.Asano
    • Journal Title

      Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials

      Pages: 90-91

    • Peer Reviewed
  • [Journal Article] Room-Temperature Large-Number Inter-Chip Connections using Mechani cal Caulking Effect of Compliant Bump2009

    • Author(s)
      N.Watanabe, T.Asano
    • Journal Title

      Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials

      Pages: 368-369

    • Peer Reviewed
  • [Journal Article] Investigation on Enhanced Impact Ionizaion in Uniaxially Strained Si MOSFET2009

    • Author(s)
      S.Adachi, T.Asano
    • Journal Title

      Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials

      Pages: 775-776

    • Peer Reviewed
  • [Presentation] Back-Side Illuminated CMOS Image Sensor Fabricated using Compliant Bump2009

    • Author(s)
      N.Watanabe
    • Organizer
      2009 International Conference on Solid State Devices and Materials
    • Place of Presentation
      仙台
    • Year and Date
      2009-09-09
  • [Presentation] Liquid Phase Bonding Using Au Compliant Bumps for Fine-Pitch Solder Bump Interconnection2009

    • Author(s)
      L.J.Qiu
    • Organizer
      2009 International Conference on Solid State Devices and Materials
    • Place of Presentation
      仙台
    • Year and Date
      2009-09-08
  • [Presentation] Room-Temperature Large-Number Inter-Chip Connections using Mechanical Caulking Effect of Compliant Bump2009

    • Author(s)
      N.Watanabe
    • Organizer
      2009 International Conference on Solid State Dev ices and Materials
    • Place of Presentation
      仙台
    • Year and Date
      2009-09-08
  • [Presentation] High-Density Room-Temperature 3D Chip-Stacking Using Mechanical Caulking With Compliant Bump andThrough-Hole-Electrode2009

    • Author(s)
      N.Watanabe
    • Organizer
      ASME 2009 InterPACK Conference
    • Place of Presentation
      San Francisco
    • Year and Date
      2009-07-20
  • [Presentation] Simulation and experiment of liquid-phase microjoining using cone-shaped compliant bump2009

    • Author(s)
      L.J.Qiu
    • Organizer
      2009 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices
    • Place of Presentation
      Busan
    • Year and Date
      2009-06-25
  • [Presentation] Compliant Bump Technology for Back-Side Illuminated CMOS Image Sensor2009

    • Author(s)
      T.Asano
    • Organizer
      2009 Int. Electronic Components and Technology Conference
    • Place of Presentation
      San Diego
    • Year and Date
      2009-05-26
  • [Presentation] Study on impact ionization in uniaxially strained MOSFET2009

    • Author(s)
      S.Adachi
    • Organizer
      2009 International Meeting for Future of Electron Devices, Kansai
    • Place of Presentation
      大阪
    • Year and Date
      2009-05-15
  • [Presentation] Application of Compliant Bump to Stacking Ultra-thin Chips with High Number of Inter-chip Connections for Back-side Illuminated CMOS Image Sensor2009

    • Author(s)
      N.Watanabe
    • Organizer
      2009 International Meeting for Future of Electron Devices, Kansai
    • Place of Presentation
      大阪
    • Year and Date
      2009-05-14
  • [Presentation] Investigation on Wet-Chemical Surface Cleaning of Au Bump for Low-Temperature Chip-Stack Bonding Using Compliant Bump2009

    • Author(s)
      T.Mori
    • Organizer
      2009 Int. Conf. Electronics Packaging
    • Place of Presentation
      京都
    • Year and Date
      2009-04-16
  • [Presentation] Integration of Compliant Bump with Through-Si-Via Technology andn Its Application to Backside Illuminated CMOS Image Sensor(Invited)2009

    • Author(s)
      T.Asano
    • Organizer
      2009 Int. Conf. Electronics Packaging
    • Place of Presentation
      京都
    • Year and Date
      2009-04-15
  • [Remarks]

    • URL

      http://hyoka.ofc.kyushu-u.ac.jp/search/details/K002917/index.html

  • [Patent(Industrial Property Rights)] 電極バンナ及びその製造並びに接読方法2010

    • Inventor(s)
      浅野種正 渡辺直也
    • Industrial Property Rights Holder
      科学技術振興機興
    • Industrial Property Number
      特許(登録手続き中)
    • Filing Date
      2010-03-09

URL: 

Published: 2011-06-16   Modified: 2016-04-21  

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