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2010 Fiscal Year Annual Research Report

形態機能性マイクロ接合によるナノデバイス/CMOS融合型三次元集積回路の創生

Research Project

Project/Area Number 21246061
Research InstitutionKyushu University

Principal Investigator

浅野 種正  九州大学, 大学院・システム情報科学研究院, 教授 (50126306)

Co-Investigator(Kenkyū-buntansha) 田中 康一郎  九州産業大学, 情報工学部, 准教授 (40253570)
Keywords三次元集積回路 / インターコネクト / 3D-LSI / マイクロ接合 / 常温接合
Research Abstract

本研究は、形態機能を発現するコンプライアント・バンプ技術をさらに発展させ、シリコンCMOSと非シリコン系ナノテクノロジーで作製したデバイスを物理的にシームレスに接続を可能にする水準の接合電極技術を開発することを目的としている。今年度の成果を以下に要約する
(1)金製の先鋭バンプとプラグ・アンド・ソケットに相当する態様で接合する新形マイクロ電極形状を考案し,常温でLSIチップの積層接続を可能にした.チップ当たり3万点を超える接続点の接続が可能であることを実証した
(2)金製先鋭バンプの微細化を進め,世界最高水準となる電極間隔10ミクロンの高密度接続を可能にした
(3)化学増幅型フォトレジストの改良を行い,銅製の先鋭マイクロバンプを,金製のものと同様に,通常のメッキ工程で作製することを可能にした
(4)クロスハッチ形のスリットを形成した電極構造を考案し,この電極を先鋭バンプとの接合により,従来の製造装置を用いて大気中で銅/銅電極の常温での接合を可能にした.接合抵抗は一接点あたり0.1オーム以下であり,三次元集積回路を始めとする多くの応用に利用できる性能をもつことを示した
(5)有限要素解析により,有機材料上の配線とLSIを金製先鋭バンプで接合する際の変形挙動を調査した結果,大きな変形を伴わずに両者を接合できる可能性が示された
(6)有機材料上に無電解メッキ法を併用して金属配線を形成する技術を開発した
(7)化合物半導体センサーアレイとCMOS LSIを本研究で開発したマイクロ電極と接合技術を利用して積層接続し,高性能の近赤外イメージセンサを作製した

  • Research Products

    (22 results)

All 2011 2010 Other

All Journal Article (13 results) (of which Peer Reviewed: 13 results) Presentation (8 results) Remarks (1 results)

  • [Journal Article] Room-Temperature Cu-Cu Bonding in Ambient Air Achieved by Using Cone Bump2011

    • Author(s)
      N.Watanabe, T.Asano
    • Journal Title

      Applied Physics Express

      Volume: 4 Pages: 016501(3)

    • Peer Reviewed
  • [Journal Article] Fabrication of Back-Side Illuminated Complementary Metal Oxide Semiconductor Image Sensor Using Compliant Bump2010

    • Author(s)
      N.Watanabe, I.Tsunoda, T.Takao, K.Tanaka, T.Asano
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 49 Pages: 04DB01(8)

    • Peer Reviewed
  • [Journal Article] Room-Temperature Bonding Using Mechanical Caulking Effect of Compliant Bumps for Chip-Stack Interconnection2010

    • Author(s)
      N.Watanabe, T.Asano
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 49 Pages: 04DB02(4)

    • Peer Reviewed
  • [Journal Article] Investigation of Enhanced Impact Ionization in Uniaxially Strained Sin-Channel Metal Oxide Semiconductor Field Effect Transistor2010

    • Author(s)
      S.Adachi, T.Asano
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 49 Pages: 04DC14(4)

    • Peer Reviewed
  • [Journal Article] Effect of Argon/Hydrogen Plasma Cleaning on Electroless Ni Deposition on Small-Area Al Pads2010

    • Author(s)
      A.Ikeda, K.Kajiwara, N.Watanabe, T.Asano
    • Journal Title

      Japanese Journal of Applied Physics

      Volume: 49 Pages: 08JA05(4)

    • Peer Reviewed
  • [Journal Article] A Liquid-Phase Bonding for High Density Chip-Stack Interconnection2010

    • Author(s)
      L.Qiu, N.Watanabe, T.Asano
    • Journal Title

      Proceedings of the 2010 International Meeting for Future of Electron Devices, Kansai

      Pages: 36-37

    • Peer Reviewed
  • [Journal Article] Room-Temperature Chip-stack Interconnection Using Compliant Bumps and Wedge-Incorporated Electrodes2010

    • Author(s)
      N.Watanabe, T.Asano
    • Journal Title

      Proceedings of the 60th Electronic Components and Technology Conference

      Pages: 1763-1768

    • Peer Reviewed
  • [Journal Article] Near-Infrared Image Sensor Fabricated Using Compliant Bump2010

    • Author(s)
      N.Watanabe, F.Hoashi, Y.Nagai, H.Inada, Y.Iguchi, T.Asano
    • Journal Title

      Ext.Abstr.2010 International Conference on Solid State Devices and Materials

      Pages: 1210-1211

    • Peer Reviewed
  • [Journal Article] Direct Bonding of LSI Chips to Flexible Substrate Using Compliant Bump2010

    • Author(s)
      T.Shuto, N.Watanabe, A.Ikeda T.Higashimachi, T.Asano
    • Journal Title

      Dig.Papers 23rd International Microprocesses and Nanotechnology Conference

      Volume: 23 Pages: 10C-3-4

    • Peer Reviewed
  • [Journal Article] Deformation Analysis of Au Cone Bump in 3D LSI Stacking Compliant Bump2010

    • Author(s)
      N.Watanabe, T.Higashimachi, T.Asano
    • Journal Title

      Dig.Papers 23rd International Microprocesses and Nanotechnology Conference

      Volume: 23 Pages: 11D-8-120

    • Peer Reviewed
  • [Journal Article] Low-Temperature and Low-Stress Micro-joining using Compliant Bump for Heterogeneous Integration2010

    • Author(s)
      T.Asano, N.Watanabe
    • Journal Title

      Proceedings of the 10th International Workshop on Microelectronics Assembling and Packaging

      Pages: 15-20

    • Peer Reviewed
  • [Journal Article] High-frequency signal transmission characteristics of coplanar waveguides with cone bump interconnections2010

    • Author(s)
      A Ikeda, K.Kajiwara, N.Watanabe, T.Asano
    • Journal Title

      Proceeding of the IEEE Region 10 Conference (TENCON) 2010

      Pages: 2191-2195

    • Peer Reviewed
  • [Journal Article] Direct Connection of LSI Chips to Polyethylene Naphthalate Using Au Cone Bump2010

    • Author(s)
      T.Shuto, N.Watanabe, A.Ikeda, T.Higashimachi, T.Asano
    • Journal Title

      Proceedings of the 17th International Display Workshops

      Pages: 1717-1720

    • Peer Reviewed
  • [Presentation] Direct Connection of LSI Chips to Polyethylene Naphthalate Using Au Cone Bump2010

    • Author(s)
      T.Shuto, N.Watanabe, A.Ikeda, T.Higashimachi, T.Asano
    • Organizer
      7th International Display Workshops (IDW'10)
    • Place of Presentation
      福岡
    • Year and Date
      2010-12-02
  • [Presentation] High-frequency signal transmission characteristics of coplanar waveguides with cone bump interconnections2010

    • Author(s)
      A Ikeda, K.Kajiwara, N.Watanabe, T.Asano
    • Organizer
      IEEE Region 10 Conference (TENCON) 2010
    • Place of Presentation
      福岡
    • Year and Date
      2010-11-22
  • [Presentation] Low-Temperature and Low-Stress Micro-joining using Compliant Bump for Heterogeneous Integration2010

    • Author(s)
      T.Asano, N.Watanabe
    • Organizer
      10th International Workshop on Microelectronics Assembling and Packaging (MAP2010)
    • Place of Presentation
      福岡
    • Year and Date
      2010-11-17
  • [Presentation] Deformation Analysis of Au Cone Bump in 3D LSI Stacking Compliant Bump2010

    • Author(s)
      N.Watanabe, T.Higashimachi, T.Asano
    • Organizer
      23rd International Microprocesses and Nanotechnology Conference (MNC 2010)
    • Place of Presentation
      北九州
    • Year and Date
      2010-11-11
  • [Presentation] Direct Bonding of LSI Chips to Flexible Substrate Using Compliant Bump2010

    • Author(s)
      T.Shuto, N.Watanabe, A.Ikeda, T.Higashimachi, T.Asano
    • Organizer
      23rd International Microprocesses and Nanotechnology Conference (MNC 2010)
    • Place of Presentation
      北九州
    • Year and Date
      2010-11-10
  • [Presentation] Near-Infrared Image Sensor Fabricated Using Compliant Bump2010

    • Author(s)
      N.Watanabe, F.Hoashi, Y.Nagai, H.Inada, Y.Iguchi, T.Asano
    • Organizer
      2010 International Conference on Solid State Devices and Materials (SSDM2010)
    • Place of Presentation
      東京
    • Year and Date
      2010-09-24
  • [Presentation] Room-Temperature Chip-stack Interconnection Using Compliant Bumps and Wedge-Incorporated Electrodes2010

    • Author(s)
      N.Watanabe, T.Asano
    • Organizer
      60th Electronic Components and Technology Conference (ECTC2010)
    • Place of Presentation
      Orland
    • Year and Date
      2010-06-02
  • [Presentation] A Liquid-Phase Bonding for High Density Chip-Stack Interconnection2010

    • Author(s)
      L.Qiu, N.Watanabe, T.Asano
    • Organizer
      2010 International Meeting for Future of Electron Devices, Kansai (IMFEDK 2010)
    • Place of Presentation
      大阪
    • Year and Date
      2010-05-14
  • [Remarks]

    • URL

      http://hyoka.ofc.kyushu-u.ac.jp/search/details/K002917/index.html

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Published: 2012-07-19  

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