2011 Fiscal Year Final Research Report
Study on automatic operating margin maximization for analog VLSI circuits with the endurance for device characteristic variation and aging degradation.
| Project/Area Number |
21560356
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| Research Category |
Grant-in-Aid for Scientific Research (C)
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| Allocation Type | Single-year Grants |
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| Section | 一般 |
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| Research Field |
Electron device/Electronic equipment
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| Research Institution | Kyushu Institute of Technology |
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Principal Investigator |
NAKAMURA Kazuyuki 九州工業大学, マイクロ化総合技術センター, 教授 (60336097)
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| Project Period (FY) |
2009 – 2011
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| Keywords | CMOS / アナログ回路 / 素子劣化 / ばらつき / 最適化 / 環境変化 / 動作マージン |
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| Research Abstract |
A new design method : “automatic operating margin maximization method“ was developed to achieve the high reliable LSIs for the automotive / robot with avoiding the problems of environmental (temperature) changes, variations, aging, etc.. For oscillators, analog amplifier, and memory (SRAM) circuits, the margin maximization technique, performance tuning technique and advanced margin-free design concept were developed respectively. Two papers, four international conference talks and two patents was issued.
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