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2011 Fiscal Year Final Research Report

Research for a design of high-speed packet switch for next-generation networks

Research Project

  • PDF
Project/Area Number 21560382
Research Category

Grant-in-Aid for Scientific Research (C)

Allocation TypeSingle-year Grants
Section一般
Research Field Communication/Network engineering
Research InstitutionAkita University

Principal Investigator

OBARA Hitoshi  秋田大学, 大学院・工学資源学研究科, 教授 (50344768)

Project Period (FY) 2009 – 2011
Keywords次世代ネットワーク / 大容量ルータ / ATMスイッチ / スケジューリング制御
Research Abstract

A new design of high-performance ATM switch, which serves as a switching engine of large capacity routers for next generation networks is described. We have proposed a novel scheduling algorithm for input-queued ATM switches, which reserves transmission time of cells at output ports unlike conventional scheduling algorithms that reserve only present time at output queuem and have shown through simulations that our algorithm can overcome conventional scheduling algorithms such as i SLIP. We have also shown a new design of high-speed switch control circuit for Benes switches, which can replace conventional crossbar switches used in input-queued switches for their reduced switch complexity.

  • Research Products

    (8 results)

All 2012 2011 2010 2009

All Journal Article (2 results) (of which Peer Reviewed: 2 results) Presentation (4 results) Patent(Industrial Property Rights) (2 results) (of which Overseas: 1 results)

  • [Journal Article] Design of partially-asynchronous parallel processing elements for setting up Benes networks in O(logN) time2009

    • Author(s)
      Kai, Y., Hamada, K., Miao, Y., Obara, H
    • Journal Title

      International Conference on Photonics in Switching

    • Peer Reviewed
  • [Journal Article] Extended class of reduced crossbar switches2009

    • Author(s)
      Obara, H
    • Journal Title

      International Conference on Advanced Technologies for Communications

    • Peer Reviewed
  • [Presentation] Benes網の並列制御回路における代表決定処理の高速化2011

    • Author(s)
      市村英也, 加藤陽介, 小原仁
    • Organizer
      平成23年度電気関連学会東北支部大会
    • Year and Date
      20110000
  • [Presentation] 入力バッファ型ATMスイッチにおける送出予約制御方式2011

    • Author(s)
      小原仁, 木野良祐
    • Organizer
      電子情報通信学会技術研究報告
    • Year and Date
      20110000
  • [Presentation] 入力バッファ型ATMスイッチのパイプライン化スケジューリング制御アルゴリズムの高速化2010

    • Author(s)
      木野良祐, 加藤陽介, 小原仁
    • Organizer
      電気関係学会東北支部連合大会
    • Year and Date
      20100000
  • [Presentation] O(logN)の処理時間を有するベネス網の並列制御回路の設計2009

    • Author(s)
      小原仁
    • Organizer
      電子情報通信学会,通信方式研究会
    • Year and Date
      20090000
  • [Patent(Industrial Property Rights)] 多段スイッチの制御回路2012

    • Inventor(s)
      小原仁, 坂田真人
    • Industrial Property Rights Holder
      秋田大学
    • Industrial Property Number
      特許、第4904497号
    • Acquisition Date
      2012-01-20
  • [Patent(Industrial Property Rights)] Multistage switch control circuit2011

    • Inventor(s)
      小原仁, 坂田真人
    • Industrial Property Rights Holder
      秋田大学
    • Industrial Property Number
      特許、WO2008/081745
    • Acquisition Date
      2011-11-15
    • Overseas

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Published: 2013-07-31  

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