2011 Fiscal Year Final Research Report
A Study on the Complexity of Negation-Limited Boolean Circuits
| Project/Area Number |
21700002
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
Fundamental theory of informatics
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| Research Institution | Shimane University (2010-2011)
Kyoto University (2009) |
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Principal Investigator |
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| Project Period (FY) |
2009 – 2011
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| Keywords | 計算量理論 / 回路計算量 / 論理回路 / 否定数限定回路 |
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| Research Abstract |
We investigated the complexity of Boolean circuits which consist of AND gates, OR gates and Negation gates for the case that the number of Negation gates is restricted. We mainly obtained results on the inversion complexity, which is the minimum number of Negation gates to compute a Boolean function, for formulas, non-deterministic circuits and probabilistic circuits. In this study, Boolean circuits are considered as a mathematical model of computation, and we studied it from the viewpoint of the computational complexity theory.
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