2010 Fiscal Year Final Research Report
Dynamic optimization of CMPs based on statistical analysis
| Project/Area Number |
21700054
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
Computer system/Network
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| Research Institution | The University of Tokyo |
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Principal Investigator |
SASAKI Hiroshi The University of Tokyo, 大学院・情報理工学系研究科, 特任助教 (20534605)
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| Project Period (FY) |
2009 – 2010
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| Keywords | チップマルチプロセッサ / 動的最適化 / 動的電源電圧制御 / 計算機アーキテクチャ / ハードウェアカウンタ |
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| Research Abstract |
In a chip multiprocessor (CMP) architecture, multiple cores usually share resources in the memory hierarchy including the last-level cache, the memory bus, and the DRAM memory banks. We derive the condition where the total CPU power consumption becomes minimum by constructing a power consumption model under resource conflicts, and propose a novel dynamic optimization method to minimize the power consumption by a cooperative access control to multiple shared resource with DVFS.
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