2011 Fiscal Year Final Research Report
FPGA design method based on self-organization maps.
Project/Area Number |
21700061
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Research Category |
Grant-in-Aid for Young Scientists (B)
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Allocation Type | Single-year Grants |
Research Field |
Computer system/Network
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Research Institution | Kumamoto University |
Principal Investigator |
AMAGASAKI Motoki 熊本大学, 大学院・自然科学研究科, 助教 (50467974)
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Project Period (FY) |
2009 – 2011
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Keywords | リコンフィギャラブルシステム |
Research Abstract |
A placement process is one of the heavily computational process in FPGA(Field Programmable Gate Array) design flow. Although nondeterministic algorithms such as SA(Simulated Annealing) algorithm are successful in solving this problem, they are known to be slow. We have been introduced neural network approach which is a Kohonen SOM(Sefl Organizing feature Maps) to FPGA placement. In our method, it is important to represent the features of netlists. However, it is not enough to sufficient for using only connection matrix as a input vectors in terms of computational resources and time. In this paper, we proposed input vector based on a shimbel index. We also discuss three graph distance measurement to enhance placement quality. Our method can improve computational time compared with SA based VPR using some benchmark circuits in the evaluation.
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[Presentation] A Self-Organization Maps Approach to FPGA Placement2012
Author(s)
Motoki Amagasaki, Yasuaki Tomonari, Masahiro Iida, Morihiro Kuga and Toshinori Sueyoshi
Organizer
The 17th Workshop on Synthesis And System Integration of Mixed Information Technologies(SASIMI2012)
Place of Presentation
Beppu, Japan, B-CONPLAZA(別府市)
Year and Date
2012-03-09
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