2012 Fiscal Year Final Research Report
Research for high-level synthesis from C to hardware with memory access
| Project/Area Number |
22700055
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| Research Category |
Grant-in-Aid for Young Scientists (B)
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| Allocation Type | Single-year Grants |
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| Research Field |
Computer system/Network
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| Research Institution | Kyushu Institute of Technology |
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Principal Investigator |
YAMAWAKI Akira 九州工業大学, 工学研究院, 助教 (10325574)
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| Project Period (FY) |
2010 – 2012
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| Keywords | VLSI 設計技術 |
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| Research Abstract |
High-level synthesis technologies that convert C program to hardware module have been researched and developed in order to reduce hardware design burden. However, the conventional HLS technologies have concentrated on generating an efficient data processing hardware but not the data memory access. This researchestablishes a generic method to generate the hardware module exactly that can hide the memory access latency on several HLS tools. The experimental results show that our method can reduce the design burden and does not affect the hardware size, whileimproving the performance by the memory latency hiding.
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Research Products
(5 results)
