2011 Fiscal Year Final Research Report
Estimation of Single Event Transient Pulses in Logic Cells from a Single Transistor
| Project/Area Number |
22760055
|
|---|
| Research Category |
Grant-in-Aid for Young Scientists (B)
|
| Allocation Type | Single-year Grants |
|---|
| Research Field |
Applied physics, general
|
|---|
| Research Institution | Japan Atomic Energy Agency |
|---|
Principal Investigator |
MAKINO Takahiro 独立行政法人日本原子力研究開発機構, 量子ビーム応用研究部門, 研究職 (80549668)
|
|---|
| Project Period (FY) |
2010 – 2011
|
| Keywords | SETパルス / 論理LSI / 耐放射線性 |
|---|
| Research Abstract |
Digital Single Event Transient(DSET) pulses are momentary voltage disturbance generated at logic gates by ion incident. Since pulse-width of DSETs is a key parameter of soft error rate in the logic VLSIs, the DSET pulse-widths from a logic cell have been extensively measured by using specially built circuits. In this research, we first estimated Digital Single Event Transient(DSET) pulse-widths originated in an inverter cell from high-energy heavy-ion-induced transient current in a single n-type MOSFET by using a table-based estimation method. We showed that the estimation method is applicable to the DSET pulse-widths estimation in the case of high-energy heavy-ion irradiation. In addition, we measured heavy ion induced current pulse cross-section on the p-type MOSFET used in the logic cell, to investigate an impact of the cross-section for the SET cross-section on the logic cell. From the results, we assume that current pulses from pMOSFET induce 25% of SET pulses.
|
