2013 Fiscal Year Final Research Report
Composing High-Performance Simulation Codes by Temporal-Spatial Tiling
Project/Area Number |
23300006
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Research Category |
Grant-in-Aid for Scientific Research (B)
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Allocation Type | Single-year Grants |
Section | 一般 |
Research Field |
Software
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Research Institution | Kyoto University |
Principal Investigator |
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Co-Investigator(Kenkyū-buntansha) |
IWASHITA Takeshi 京都大学, 学術情報メディアセンター, 准教授 (30324685)
HIRAISHI Tasuku 京都大学, 学術情報メディアセンター, 助教 (60528222)
OMUA Yoshiharu 京都大学, 生存圏研究所, 教授 (50177002)
MURATA Sumihiko 京都大学, 大学院・工学研究科, 准教授 (30273478)
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Project Period (FY) |
2011-04-01 – 2014-03-31
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Keywords | ハイパフォーマンスコンピューティング / タイリング / コード生成 / コード変換 |
Research Abstract |
Temporal-Spatial (TS) tiling proposed in this research is an optimization technique to improve the memory access locality in a TS-nested loop, adopted in most of simulation codes as their fundamental structure, by splitting the spatial loop into a set of those for smaller spaces (tiles) fitting to cache memory and by iterating updates on each tile for multiple time steps. In this research, we developed a framework of automatic application of TS tiling based on local-view fragmental coding, and then applied TS tiling to applications including FDTD electromagnetic field analysis, PIC plasma simulation, and multi-grid Poisson solver, to confirm each application is accelerated by factor two as we aimed at.
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Research Products
(18 results)