Development of Data Parallel Processors both for Programmability and Peak Performance

2014 Fiscal Year Final Research Report

• Project/Area Number: 23300013
• Research Category: Grant-in-Aid for Scientific Research (B)
• Allocation Type: Single-year Grants
• Section: 一般
• Research Field: Computer system/Network
• Research Institution: National Institute of Informatics (2013); The University of Tokyo (2011-2012)
• Principal Investigator: GOSHIMA Masahiro 国立情報学研究所, アーキテクチャ科学研究系, 特任教授 (90283639)
• Co-Investigator(Kenkyū-buntansha): SHIOYA Ryota 名古屋大学, 工学研究科, 助教 (10619191) ; SAKAI Shuichi 東京大学, 情報理工学系研究科, 教授 (50291290)
• Project Period (FY): 2011-04-01 – 2015-03-31
• Keywords: 計算機アーキテクチャ / スーパスカラ・プロセッサ / SIMD / FPGA / マイクロアーキテクチャ / コンピュータ・アーキテクチャ

Outline of Final Research Achievements

Although SIMD is playing an important role in vector processing, because of its low programmability, it cannot cope with new applications which are becoming more complicated. This research places equal emphasis on programmability and for peak performance. We developed the "Rai-Shou-Dou" superscalar processor which have several proposed techniques implemented. This processor won the first prize over SIMD processors in the professional category of The 1st IPSJ SIG-ARC High-Performance Processor Design Contest.

Free Research Field

システム・アーキテクチャ