Study on a substrate for ultra high density power supply on chip

2015 Fiscal Year Final Research Report

• Project/Area Number: 24360111
• Research Category: Grant-in-Aid for Scientific Research (B)
• Allocation Type: Partial Multi-year Fund
• Section: 一般
• Research Field: Power engineering/Power conversion/Electric machinery
• Research Institution: Kyushu Institute of Technology
• Principal Investigator: Matsumoto Satoshi 九州工業大学, 大学院工学研究院, 教授 (10577282)
• Co-Investigator(Kenkyū-buntansha): SHINKAI Shinichi 九州工業大学, マイクロ化総合技術センター, 准教授 (90374785) ; NISHIZAWA Shinichi 産業技術総合研究所, エネルギー技術部門, グループリーダー (40267414) ; BABA Akiyoshi 九州工業大学, マイクロ化総合技術センター, 准教授 (80304872)
• Project Period (FY): 2012-04-01 – 2016-03-31
• Keywords: 集積化電源 / Si on Diamond / 排熱

Outline of Final Research Achievements

R＆D trend for the power supply is how to reduce the volume and power SoC(Supply on Chip) is attracted attentions of many researchers because it can ultimate miniaturization of the power supply. To increase the switching frequency of power supply is one of the promising candidates to reduce the size of power supply. On the other hand, to reduce the size of power supply has a limitation because of self heating. SOI(Silicon on Insulator) substrate is suitable for high frequency switching because of minimization of the parasitic capacitance however it has a problem of self heating because small thermal conductivity of the buried SiO2 layer.
In this study, we propose the SOD(silicon on Diamond) substrate which has larger thermal conductivity of the diamond film used as a buried insulator layer and fabrication process of it. In addition, we also report the impact of SOD substrate as a counter part of SOI substrate.

Free Research Field

パワーエレクトロニクス