Fabrication of vertical strained-Ge MOSFETs by channel-last process and the electrical characterization

2014 Fiscal Year Final Research Report

• Project/Area Number: 24360120
• Research Category: Grant-in-Aid for Scientific Research (B)
• Allocation Type: Partial Multi-year Fund
• Section: 一般
• Research Field: Electronic materials/Electric materials
• Research Institution: Osaka University
• Principal Investigator: SHIMURA Takayoshi 大阪大学, 工学(系)研究科(研究院), 准教授 (90252600)
• Co-Investigator(Renkei-kenkyūsha): WATABABE Heiji 大阪大学, 大学院工学研究科, 教授 (90379115) ; HOSOI Takuji 大阪大学, 大学院工学研究科, 助教 (90452466)
• Project Period (FY): 2012-04-01 – 2015-03-31
• Keywords: 電気・電子材料 / 作成・評価技術 / エピタキシャル成長 / 半導体 / ゲルマニウム / 格子歪み

Outline of Final Research Achievements

We have fabricated Ge wires by liquid-phase epitaxy during rapid thermal annealing. The field effect transistors with the Ge wires exhibited high on/off current ratio under the accumulation mode. Moreover, effective hole mobility of 500 cm2/Vs was obtained, which was almost 1.6 times higher than the reference Si device. Direct band gap shrinkage was also investigated by means of photoluminescence spectroscopy. We observed a significant redshift of direct gap emission amounting to 45 meV for the Ge wire, which was mainly due to a tensile strain of approximately 0.4% induced by rapid crystallization from the Ge melting point.

Free Research Field

電子デバイス材料