Accurate measurement and statistical analysis of gate leakage current of MOSFETs with atomically flat interface

2014 Fiscal Year Final Research Report

• Project/Area Number: 24360129
• Research Category: Grant-in-Aid for Scientific Research (B)
• Allocation Type: Partial Multi-year Fund
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: Tohoku University
• Principal Investigator: SUGAWA Shigetoshi 東北大学, 工学(系)研究科(研究院), 教授 (70321974)
• Co-Investigator(Renkei-kenkyūsha): KURODA Rihito 東北大学, 大学院工学研究科, 准教授 (40581294)
• Project Period (FY): 2012-04-01 – 2015-03-31
• Keywords: 電子デバイス・機器 / 電子デバイス・集積回路 / MOSFET / シリコン / リーク電流 / ストレス誘起電流 / 平坦化

Outline of Final Research Achievements

Atomically flattening technology of gate insulator film/Si interface was introduced to a 0.22 um CMOS LSI manufacturing technology. It was clarified that the atomic level flatness is obtained at the interface of miniaturized MOSFET by introducing the Si surface flattening process at a temperature less than 850 C right before gate insulator film formation process step. The array test circuit was fabricated based on the introduced technology. By measuring gate current of over 80000 MOSFETs with gate insulator film thickness of 7.7 nm within 80 sec with 10aA accuracy using the developed high accuracy statistical measurement technology, it was confirmed that the appearance probability of MOSFETs with large gate current is decreased by one order of magnitude in comparison to the conventional MOSFETs of which roughness at the gate insulator film/Si interface is about 1 nm.

Free Research Field

固体電子工学