A Circuit Level Stabilizing Technique for Implementing Film Computers

2014 Fiscal Year Final Research Report

• Project/Area Number: 24650020
• Research Category: Grant-in-Aid for Challenging Exploratory Research
• Allocation Type: Multi-year Fund
• Research Field: Computer system/Network
• Research Institution: Nara Institute of Science and Technology
• Principal Investigator: NAKASHIMA YASUHIKO 奈良先端科学技術大学院大学, 情報科学研究科, 教授 (00314170)
• Co-Investigator(Kenkyū-buntansha): HARA Yuko 奈良先端科学技術大学院大学, 情報科学研究科, 助教 (20640999)
• Co-Investigator(Renkei-kenkyūsha): URAOKA Yukiharu 奈良先端科学技術大学院大学, 物質創成科学研究科, 教授 (20314536)
• Project Period (FY): 2012-04-01 – 2015-03-31
• Keywords: ディペンダブル / 小型CPU / エミュレーション / 高信頼化CAD / 耐故障アクセラレータ / PPC

Outline of Final Research Achievements

uClinux for 32bit computer has successfully worked on tiny 8bit CPU on FPGA. A physical layout of the tiny CPU with only 10000 transistors has been completed. An instruction level workaround technique for bypassing hardware defects, PPC (Partially Programmable Circuit) technique for bypassing logic defects, hardware level defect detector without TMR (Triple Module Redundancy) and reconfiguration technique for defect isolation are established. A dependable FU array accelerator has been designed and the high-dependability has been observed by error injection with an alpha-particle generator.

Free Research Field

コンピュータ・アーキテクチャ