2013 Fiscal Year Final Research Report
A Novel Design Technique for Wireless LAN Receiver Systems utilizing Dithering Signals
Project/Area Number |
24700049
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Research Category |
Grant-in-Aid for Young Scientists (B)
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Allocation Type | Multi-year Fund |
Research Field |
Computer system/Network
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Research Institution | University of Yamanashi (2013) Kyushu University (2012) |
Principal Investigator |
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Project Period (FY) |
2012-04-01 – 2014-03-31
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Keywords | LSI / 無線 / 1bit 分解能 A/D / ディザ |
Research Abstract |
We have investigated low cost implementation design technique for wireless communication LSIs. We are interested in a single carrier phase modulation (constant envelope modulation) system in order to eliminate a variable-gain amplifier and a high resolution A/D converter. We proposed a new low cost implementation technique which uses the one bit resolution A/D converter. By utilizing the customized equalizer for the one bit resolution A/D converter, the size of the A/D converter can be reduced to 0.007mm2. The proposed techniques can improve SNR approximately 7dB with small die size.
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[Presentation]2014
Author(s)
Daisuke Kanemoto,Osamu Muta, Hiroshi Furukawa, Takahide Sato, and Makoto Ohki
Organizer
The 18th IEEE International Symposium on Consumer Electronics
Year and Date
2014-06-24
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