Development of a computer system with an efficient core fusion mechanism

2015 Fiscal Year Final Research Report

• Project/Area Number: 25330056
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Computer system
• Research Institution: Tokyo Institute of Technology
• Principal Investigator: Kise Kenji 東京工業大学, 大学院情報理工学研究科, 准教授 (50323887)
• Project Period (FY): 2013-04-01 – 2016-03-31
• Keywords: コア融合 / 計算機システム / プロセッサ / FPGA

Outline of Final Research Achievements

In this research, we designed and verified our realistic microarchitecture of CoreSymphony in hardware description language which enables efficient cooperative core features on multi-core processors. In other words, we reduced the required hardware cost for CoreSymphony processors using sophisticated microarchitecture techniques. Moreover, in order to develop an FPGA (field-programmable gate array) board for computer architecture research, high-speed serial communication between FPGA boards with serial ATA cables is evaluated and confirmed its high data bandwidth and we designed original FPGA board with this high-speed serial communication, FPGA, and DRAM chip.

Free Research Field

計算機アーキテクチャ