The study of the low-power, digital output signal processing circuits for capacitive sensors

2016 Fiscal Year Final Research Report

• Project/Area Number: 25420329
• Research Category: Grant-in-Aid for Scientific Research (C)
• Allocation Type: Multi-year Fund
• Section: 一般
• Research Field: Electron device/Electronic equipment
• Research Institution: University of Yamanashi
• Principal Investigator: OGAWA Satomi 山梨大学, 総合研究部, 准教授 (40252168)
• Research Collaborator: SATO Takahide ; YOKOTE Hiroji
• Project Period (FY): 2013-04-01 – 2017-03-31
• Keywords: 容量型センサ / 容量・時間変換器 / 時間・ディジタル変換器 / スイッチドキャパシタ回路 / センサ信号処理回路 / CMOSアナログ回路

Outline of Final Research Achievements

A high-accuracy CMOS interface for differential capacitive sensors using a time-to-digital converter (TDC) is presented. The proposed TDC achieves high resolution using two clock signals of which the periods are different. The performances of the proposed CMOS interface are simulated by HSPICE using 0.18 um CMOS process parameters. The resolutions of 11.3 bits are achieved with calibration. The maximum nonlinear errors are smaller than plus/minus 0.55 LSB. The measured results of a prototype circuit indicate that the resolutions of 10.3 bits is achievable.
To realize higher-accuracy capacitance-to-time conversion, three differential-capacitance-to-time converters (DCTC) for capacitive sensors were proposed. Simulated results have demonstrated that 12-bit resolution is achievable. The power consumption of the proposed circuits is 25.6 microwatts for 1.8 V
The proposed circuit is suited for co-integration with MEMS-type sensors and microcontroller-based measurement system.

Free Research Field

電子デバイス・集積回路