Performance-scalable reconfigurable system based on tightly-coupled reconfigurable devices

2015 Fiscal Year Final Research Report

• Project/Area Number: 25730032
• Research Category: Grant-in-Aid for Young Scientists (B)
• Allocation Type: Multi-year Fund
• Research Field: Computer system
• Research Institution: Kochi University of Technology
• Principal Investigator: Mitsuyama Yukio 高知工科大学, 工学部, 准教授 (80346189)
• Project Period (FY): 2013-04-01 – 2016-03-31
• Keywords: 再構成可能システム / 開発環境 / FPGA

Outline of Final Research Achievements

This project aimed at realization of performance-scalable reconfigurable system based on tightly-coupled reconfigurable devices. Specifically,the following research issues are tackled. 1) a development of evaluation platform for a coarse-grained reconfigurable architecture exploration and its demonstration, 2) a development of an FPGA prototyping technique for tightly-coupled coarse-grained reconfigurable chips, and 3) an experimental measurement of performance variation on commercial FPGAs under various operating conditions.

Free Research Field

再構成可能アーキテクチャ、FPGA応用、VLSI設計手法