Research on low-power motion estimation architecture for HEVC

2015 Fiscal Year Final Research Report

• Project/Area Number: 25870816
• Research Category: Grant-in-Aid for Young Scientists (B)
• Allocation Type: Multi-year Fund
• Research Field: Communication/Network engineering; Electron device/Electronic equipment
• Research Institution: Waseda University
• Principal Investigator: ZHOU DAJIANG 早稲田大学, 理工学術院, 助教 (10607336)
• Project Period (FY): 2013-04-01 – 2016-03-31
• Keywords: 動き予測 / 動画像 / 符号化 / 低消費電力 / UHDTV

Outline of Final Research Achievements

New compression technologies are highly desirable to accommodate new video specifications such as 4K and 8K. The new international video coding standard H.265/HEVC, finalized in 2013, is capable of delivering a compression ratio of 200 times. However, the high compression ratio is achieved by employing many new and computation intensive features, which significantly increases the difficulty in realizing low-energy-consumption implementations. By developing efficient algorithms and architectures, this research aims at a remarkable reduction of energy consumption of motion estimation, which is the most energy consuming component of HEVC video compression. Through a series of innovative technologies such as integer and fractional motion estimation algorithms, alternating asymmetric search range assignment and mode filtering, this research has successfully reduced over 75% of energy consumption for an implementation of HEVC compression.

Free Research Field

電気電子工学