Development of counting-type pixel detector using double SOI wafer

2014 Fiscal Year Final Research Report

• Project/Area Number: 25871110
• Research Category: Grant-in-Aid for Young Scientists (B)
• Allocation Type: Multi-year Fund
• Research Field: Quantum beam science; Particle/Nuclear/Cosmic ray/Astro physics
• Research Institution: High Energy Accelerator Research Organization
• Principal Investigator: MIYOSHI Toshinobu 大学共同利用機関法人高エネルギー加速器研究機構, 素粒子原子核研究所, 研究機関講師 (20470015)
• Project Period (FY): 2013-04-01 – 2015-03-31
• Keywords: 半導体 / X線 / 電子デバイス / SOI / CMOS

Outline of Final Research Achievements

We have developed pixel detectors including both sensor and circuit, using SOI (Silicon-on-insulator), which improves performance of CMOS circuit. The pixel circuit includes preamplifier, discriminator, and counter. To solve problems such as crosstalk between sensor and circuit and radiation hardness, double SOI wafer has utilized. Top SOI layer was used as SOI-CMOS circuit and the bottom as a shield layer. When a constant voltage was applied in the middle SOI layer, the crosstalk was suppressed. When negative voltages were applied, radiation hardness was improved. The results might promise the utilization of the SOI counting-type pixel detectors for various application.

Free Research Field

エレクトロニクス